Practicals & Theses

List of practicals and theses at the institute (see also TI Research Presentations)

Details for Loosening Bounds for Nondeterministic Delay Estimation

Estimating the delay of a gate is a very crucial task in circuit
design. However, no matter how accurate the gate characterization is,
real circuits will always experience some manufacturing variations
and operating condition dependencies that lead to unpredictable
delay variations. We therefore augmented our novel involution delay
model by adding non-deterministic delay noise. Unfortunately, tight
bounds on the maximum variation had to be introduced in order to
retain the correctness properties of the model. The purpose of this
assignment is to relax these tight bounds, by exploiting the fact
that the delay noise primarily affects very short pulses in the
signal traces only.


Your task would be to get to know our noisy involution delay function and 
the analytical proofs of the model properties, and to look for ways to
relax the bounds on the maximum variations due to noise. Particular goals
are an adapted correctness proof and an experimental evaluation of the
improved model coverage w.r.t. delay noise in real circuits.

Required Skills

Mathematical (formal) proofs


Dipl.-Ing. Dr.techn. Ulrich SCHMID

Univ.Ass. Dipl.-Ing. Dipl.-Ing. BSc Jürgen MAIER (main responsibility)


Praktikum, Diplomarbeit