Publications

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Presentations

M Függer, J. Maier, R. Najvirt, T. Nowak, U. Schmid: A Faithful Binary Circuit Model with Adversarial Noise
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE'18), Dresden, Deutschland; in: Proceedings of the 2018 Design, Automation & Test in Europe (DATE), 2018, ISBN: 978-3-9819263-1-6, p. 1327 - 1332
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D. Ratasich, T. Preindl, K. Selyunin, R. Grosu: Self-Healing by Property-Guided Structural Adaptation
1st IEEE International Conference on Industrial Cyber-Physical Systems (ICPS 2018), St. Petersburg; in: 1st IEEE International Conference on Industrial Cyber-Physical Systems (ICPS 2018), IEEE, 2018, ISBN: 978-1-5386-6531-2, p. 199 - 205
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G. Tarawneh, M Függer, C. Lenzen: Metastability tolerant computing
23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017), San Diego, California; in: Proceedings 2017 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017), IEEE Computer Society, 10662 Los Vaqueros Circle (2017), ISBN: 978-1-5386-2749-5, p. 25 - 32
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M Függer, T. Nowak, M. Schwarz: Brief Announcement: Lower Bounds for Asymptotic Consensus in Dynamic Networks
31st International Symposium on Distributed Computing (DISC 2017), Wien; in: Leibniz International Proceedings in Informatics (LIPIcs), 2017, ISSN: 1868-8969; 3 pages
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M Függer, A. Kinali, C. Lenzen, T. Polzer: Metastability-aware memory-efficient time-to-digital converter
23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017), San Diego, California; in: Proceedings 2017 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017), IEEE Computer Society, 10662 Los Vaqueros Circle (2017), ISBN: 978-1-5386-2749-5, p. 49 - 56
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M. Shafique (invited): Approximate Computing across the Hardware and Software Stacks
Invited Talks at TU Eindhoven, TU Eindhoven, Netherlands
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M. Shafique (invited): Cross-Layer Approximate Computing: From Circuits to Applications
Invited Talks at University of Twente, University of Twente, Netherlands
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B. Fritz, V. S. Veeravalli, A. Steininger, V. Simek: Setup for an Experimental Study of Radiation Effects in 65nm CMOS
20th Euromicro Conference on Digital System Design, Wien; in: Proceedings of the 20th Euromicro Conference on Digital System Design, 2017, p. 329 - 336
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M. Andjelkovic, M. Krstic, R. Kraemer, V. S. Veeravalli, A. Steininger: A Critical Charge Model for Estimating the SET and SEU Sensitivity: A Muller C-Element Case Study
The 26th IEEE Asian Test Symposium (ATS´17), Taipei, Taiwan; in: Proceedings of the 26th IEEE Asian Test Symposium (ATS´17), 2017, p. 1 - 6
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M. Shafique: Low-Power Computing and Emerging Trends
CPS Summer School 2017, Porto Conte Ricerche, Alghero, Italy
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M. Shafique: Robust Heterogeneous Computing for CPS
CPS Summer School 2017, Porto Contr Ricerche, Alghero, Italy
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M. Shafique (invited): Enabling Extreme Energy-Efficiency through Brain-Inspired Computing Trends: From Approximate to Neural Processing
15th International Conference On Frontiers of Information Technology (FIT'17), Islamabad, Pakistan; in: 15th International Conference On Frontiers of Information Technology (FIT'17), 2017
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M. Shafique (invited): Emerging Brain-Inspired Computing Trends: From Approximate Computing to Neural Processing
International Conference On Latest Trends in Electrical Engineering and Computing Technologies (INTELLECT'17), Karachi, Pakistan; in: International Conference On Latest Trends in Electrical Engineering and Computing Technologies (INTELLECT'17), 2017
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M. Shafique, R. Hafiz, M. Javed, S. Abbas, L. Sekanina, Z. Vasicek, V. Mrazek: Adaptive and Energy-Efficient Architectures for Machine Learning: Challenges, Opportunities, and Research Roadmap
2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI'17), 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI'17); in: Proceedings of 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI'17), IEEE, 2017, ISSN: 2159-3477, p. 617 - 632
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H. Lee, M. Shafique, M. Al Faruque: Low-overhead Aging-aware Resource Management on Embedded GPUs
2017 ACM/EDAC/IEEE 54th Design Automation Conference (DAC'17), Austin, Texas, USA; in: Proceedings of the 54th Annual Design Automation Conference (DAC) 2017, ACM, 2017, ISBN: 978-1-4503-4927-7, p. 67:1 - 67:6
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M. Hanif, R. Hafiz, O. Hasan, M. Shafique: QuAd: Design and Analysis of Quality-Area Optimal Low-Latency Approximate Adders
2017 ACM/EDAC/IEEE 54th Design Automation Conference (DAC'17), Austin, Texas, USA; in: Proceedings of the 54th Annual Design Automation Conference (DAC) 2017, ACM, 2017, ISBN: 978-1-4503-4927-7, p. 42:1 - 42:6
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M. Ayub, O. Hasan, M. Shafique: Statistical Error Analysis for Low Power Approximate Adders
2017 ACM/EDAC/IEEE 54th Design Automation Conference (DAC'17), Austin, Texas, USA; in: Proceedings of the 54th Annual Design Automation Conference (DAC) 2017, ACM, 2017, ISBN: 978-1-4503-4927-7, p. 75:1 - 75:6
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D. Ratasich, O. Hoftberger, H. Isakovic, M. Shafique, R. Grosu: A Self-Healing Framework for Building Resilient Cyber-Physical Systems
20th IEEE International Symposium on Real-Time Computing (ISORC 2017), Toronto, Canada; in: Proc. 20th IEEE International Symposium on Real-Time Computing (ISORC 2017), IEEE, 2017, ISSN: 2375-5261, p. 133 - 140
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W. El-Harouni, S. Rehman, B. Prabakaran, A. Kumar, R. Hafiz, M. Shafique: Embracing Approximate Computing for Energy-Efficient Motion Estimation in High Efficiency Video Coding
2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE'17), Lausanne, Switzerland; in: Proceedings of the 2017 Design, Automation & Test in Europe (DATE), IEEE, 2017, ISSN: 1558-1101, p. 1384 - 1389
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A. Subramaniyan, S. Rehman, M. Shafique, A. Kumar, J. Henkel: Soft Error-Aware Architectural Exploration for Designing Reliability Adaptive Cache Hierarchies in Multi-Cores
2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE'17), Lausanne, Switzerland; in: Proceedings of the 2017 Design, Automation & Test in Europe (DATE), IEEE, 2017, ISSN: 1558-1101, p. 37 - 42
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A. Pathania, K. Khdr, M. Shafique, T. Mitra, J. Henkel: Scalable Probabilistic Power Budgeting for Many-Cores
2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE'17), Lausanne, Switzerland; in: Proceedings of the 2017 Design, Automation & Test in Europe (DATE), IEEE, 2017, ISSN: 1558-1101, p. 864 - 869
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S. Bukhari, F. Lodhi, O. Hasan, M. Shafique, J. Henkel: CAnDy-TM: Comparative Analysis of Dynamic Thermal Management in Many-Cores using Model Checking
2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE'17), Lausanne, Switzerland; in: Proceedings of the 2017 Design, Automation & Test in Europe (DATE), IEEE, 2017, ISSN: 1558-1101, p. 1289 - 1292
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A. Chattopadhyay, A. Prakash, M. Shafique: Secure Cyber-Physical Systems: Current Trends, Tools and Open Research Problems
2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE'17), Lausanne, Switzerland; in: Proceedings of the 2017 Design, Automation & Test in Europe (DATE), IEEE, 2017, ISSN: 1558-1101, p. 1104 - 1109
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R. Hasani, M. Fuchs, V. Beneder, R. Grosu: Modeling a Simple Non-Associative Learning Mechanism in the Brain of Caenorhabditis elegans
Workshop on Biomedical Informatics with Optimization and Machine Learning (BOOM), 2017, Melbourne, Australia; in: Proceedings of the Workshop on Biomedical Informatics with Optimization and Machine Learning (BOOM), 2017, 2017; 5 pages
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R. Hasani, V. Beneder, M. Fuchs, D. Lung, R. Grosu: SIM-CE: An Advanced Simulation Platform for Studying the brain of Caenorhabditis elegans
Workshop on Computational Biology at the 34th International Conference on Machine Learning(ICML), 2017, Sydney, Australia; in: Proceedings of the Workshop on Computational Biology at the 34th International Conference on Machine Learning(ICML), 2017, 2017; 5 pages
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M. Fuchs, Z. Zimmer, R. Grosu, R. Hasani: Searching for Biophysically Realistic Parameters for Dynamic Neuron Models by Genetic Algorithms from Calcium Imaging Recording
Workshop on Worm´s Neural Information Processing at the 31st Neural Information Processing Systems (NIPS) Conference, 2017, Long Beach, CA, USA; in: Proceedings of the Workshop on Worm´s Neural Information Processing at the 31st Neural Information Processing Systems (NIPS) Conference, 2017, 2017; 6 pages
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D. Lung, S. Larson, A. Palyanov, S. Khayrulin, P. Gleeson, Z. Zimmer, R. Grosu, R. Hasani: A Simplified Cell Network for the Simulation of C. elegans´ Forward Crawling
Workshop on Worm´s Neural Information Processing at the 31st Neural Information Processing Systems (NIPS) Conference, 2017, Long Beach, CA, USA; in: Proceedings of the Workshop on Worm´s Neural Information Processing at the 31st Neural Information Processing Systems (NIPS) Conference, 2017, 2017; 5 pages
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M. Lechner, R. Grosu, R. Hasani: Worm-level Control through Search-based Reinforcement Learning
Deep Reinforcement Learning Symposium at the 31st Neural Information Processing Systems (NIPS) Conference, 2017, Long Beach, CA, USA; in: Proceedings of the Deep Reinforcement Learning Symposium at the 31st Neural Information Processing Systems (NIPS) Conference, 2017, 2017; 5 pages
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J. Cyranka, A. Islam, G. Byrne, P. Jones, S. Smolka, R. Grosu: Lagrangian Reachabililty
CAV 2017: the 29th International Conference on Computer-Aided Verification, Heidelberg, Germany; in: Proc. of CAV 2017: the 29th International Conference on Computer-Aided Verification, Springer, 10426 (2017), ISBN: 978-3-319-63387-9, p. 379 - 400
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D. Phan, J. Yang, M. Clark, R. Grosu, J. Schierman, S. Smolka, S. Stoller: A Component-Based Simplex Architecture for High-Assurance Cyber-Physical Systems
Application of Concurrency to System Design (ACSD), 2017 17th International Conference on, Zaragoza, Spain; in: Application of Concurrency to System Design (ACSD), 2017 17th International Conference on, 2017, ISBN: 978-1-5386-2868-3, p. 49 - 58
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G. Wang, R. Hasani, Z. Yungang, R. Grosu: A Novel Bayesian Network-Based Fault Prognostic Method for Semiconductor Manufacturing Process
2017 Annual IEEE Industrial Electronics Society´s 18th International Conference on Industrial Technology (ICIT 2017), Toronto, ON, Canada; in: Proceedings of the 2017 Annual IEEE Industrial Electronics Society´s 18th International Conference on Industrial Technology (ICIT 2017), IEEE, 2017, ISBN: 978-1-5090-5321-6, p. 1450 - 1454
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R. Hasani, D. Haerle, C. Baumgartner, A. Lomuscio, R. Grosu: Compositional Neural-Network Modeling of Complex Analog Circuits
IEEE International Joint Conference on Neural Networks (IJCNN), Anchorage, Alaska, USA; in: Proceedings of the 2017 International Joint Conference on Neural Networks, 2017, ISSN: 2161-4407, p. 2235 - 2242
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R. Hasani, G. Wang, R. Grosu: Towards Deterministic and Stochastic Computations with Izhikevich Spiking Neuron Model
IWANN 2017: 14th International Work-Conference on Artificial Neural Networks - Advances in Computational Intelligence, Cádiz, Spain; in: Proc.of IWANN 2017: 14th International Work-Conference on Artificial Neural Networks - Advances in Computational Intelligence, Springer, 10305 (2017), ISBN: 978-3-319-59146-9, p. 392 - 402
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F. Shmarov, N. Paoletti, E. Bartocci, S. Li, S. Smolka, P. Zuliani: SMT-based Synthesis of Safe and Robust PID Controllers for Stochastic Hybrid Systems
Proc. of HVC 2017: the 13th IBM Haifa Verification Conference, Haifa, Israel; in: Proc. of HVC 2017: the 13th IBM Haifa Verification Conference, Springer, 10629 (2017), p. 131 - 146
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A. Tiwari, S. Smolka, L. Esterle, A. Lukina, J. Yang, R. Grosu: Attacking the V: On the Resiliency of Adaptive-Horizon MPC
15th International Symposium on Automated Technology for Verification and Analysis, ATVA 2017, Pune, India; in: Proceedings of the 15th International Symposium on Automated Technology for Verification and Analysis, Springer International Publishing, 10482, Cham (2017), ISBN: 978-3-319-68166-5, p. 446 - 462
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M. Zeiner, U. Schmid, M. Schwarz: On Linear-Time Data Dissemination in Dynamic Rooted Trees
19th ÖMG Congress and Annual DMV Meeting, Salzburg; in: 19th ÖMG Congress and Annual DMV Meetig Program and Books of Abstracts, 2017, p. 87
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B. Aminof, S. Rubin, I. Stoilkovska, J. Widder, F. Zuleger: Parameterized Model Checking of Synchronous Distributed Algorithms by Abstraction
Verification, Model Checking, and Abstract Interpretation (VMCAI), Los Angeles; in: VMCAI, LNCS/Springer, 10747 (2018), p. 1 - 24
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T. Polzer, F. Huemer, A. Steininger: Measuring Metastability Using a Time-to-Digital Converter
20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Dresden; in: Proceedings 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, IEEE Service Center, 2017, ISBN: 978-1-5386-0471-7; 6 pages
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R. Najvirt, T. Polzer, A. Steininger: Measuring Metastability with Free-Running Clocks
23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017), San Diego, California; in: Proceedings 2017 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017), IEEE Computer Society, 10662 Los Vaqueros Circle (2017), ISBN: 978-1-5386-2749-5; 7 pages
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H. Isakovic, R. Grosu, D. Ratasich, J. Kadlec, Z. Pohl, S. Kerrison, K. Georgiou, N. Druml, L. Tadros, F. Christiansen, E. Wheatley, B. Farkas, R. Meyer, M. Berekovic (invited): A Survey of Hardware Technologies for Mixed-Critical Integration Explored in the Project EMC2
SAFECOMP 2017 DECSoS, Trento; in: Computer Safety, Reliability, and Security, Lecture Notes in Computer Science / Springer, Volume 10486 (2017), ISBN: 978-3-319-66284-8, p. 124 - 140
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R. Kuznets (invited): The Byzantine Mind
Seminar Logic and Theoretical Computer Science, University of Bern (2017), Bern
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D. Ratasich, O. Höftberger, H. Isakovic, M. Shafique, R. Grosu: A Self-Healing Framework for Building Resilient Cyber-Physical Systems
20th IEEE International Symposium on Real-Time Computing (ISORC 2017), Toronto, Canada; in: Real-Time Distributed Computing (ISORC), 2017 IEEE 20th International Symposium on, IEEE, 2017, ISBN: 978-1-5386-1574-4, p. 133 - 140
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S. Arming, E. Bartocci, A. Sokolova: SEA-PARAM: Exploring Schedulers in Parametric MDPs
QAPL 2017: the 15 International Workshop on Quantitative Aspects of Programming Languages and Systems, Uppsala, Sweden; in: Proc. of QAPL 2017: the 15 International Workshop on Quantitative Aspects of Programming Languages and Systems, EPCTS, 250 (2017), p. 25 - 38
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K. Selyunin, S. Jaksic, T. Nguyen, C. Reidl, U. Hafner, E. Bartocci, D. Nickovic, R. Grosu: Runtime Monitoring with Recovery of the SENT Communication Protocol
CAV 2017: the 29th International Conference on Computer-Aided Verification, Heidelberg, Germany; in: Proc. of CAV 2017: the 29th International Conference on Computer-Aided Verification, Springer, 10426 (2017), p. 336 - 355
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E. Bartocci, L. Bortolussi, M. Loreti, L. Nenzi: Monitoring Mobile and Spatially Distributed Cyber-Physical Systems
MEMOCODE 2017: the 15th ACM-IEEE International Conference on Formal Methods and Models for System Design, Vienna, Austria; in: Proc. of MEMOCODE 2017: the 15th ACM-IEEE International Conference on Formal Methods and Models for System Design, ACM, 2017, p. 146 - 155
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K. Selyunin, R. Hasani, D. Ratasich, E. Bartocci, R. Grosu: Computing with Biophysical and Hardware-efficient Neural Models
IWANN 2017: 14th International Work-Conference on Artificial Neural Networks - Advances in Computational Intelligence, Cádiz, Spain; in: Proc.of IWANN 2017: 14th International Work-Conference on Artificial Neural Networks - Advances in Computational Intelligence, Springer, 10305 (2017), p. 535 - 547
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A. Lukina, L. Esterle, C. Hirsch, E. Bartocci, J. Yang, S. Smolka, A. Tiwari, R. Grosu: ARES: Adaptive Receding-Horizon Synthesis of Optimal Plans
TACAS 2017: the 23rd International Conference on Tools and Algorithms for the Construction and Analysis of Systems, Uppsala, Sweden; in: Proc. of TACAS 2017: the 23rd International Conference on Tools and Algorithms for the Construction and Analysis of Systems, Springer, 10206 (2017), p. 286 - 302
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M. Baldi, E. Bartocci, F. Chiaraluce, A. Cucchiarelli, L. Senigagliesi, L. Spalazzi, F. Spegni: A Probabilistic Small Model Theorem to Assess Confidentiality of Dispersed Cloud Storage
QEST 2017: the 14th International Conference on Quantitative Evaluation of SysTems, Berlin, Germany; in: Proc. of QEST 2017: the 14th International Conference on Quantitative Evaluation of SysTems, Springer, 10503 (2017), ISBN: 978-3-319-66335-7, p. 123 - 139
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M. Ben Sassi, E. Bartocci, S. Sankaranarayanan: A Linear Programming-based iterative approach to Stabilizing Polynomial Dynamics
IFAC 2017: the 20th World Congress of the International Federation of Automatic Control, Toulouse, France; in: IFAC 2017: the 20th World Congress of the International Federation of Automatic Control, Elsevier, 50 (1) (2017), p. 10462 - 10469
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H. Abbas, A. Rodionova, E. Bartocci, S. Smolka, R. Grosu: Quantitative Regular Expressions for Arrhythmia Detection Algorithms
CMSB 2017: the 15th International Conference on Computational Methods in Systems Biology, Darmstadt, Germany; in: Proc. of CMSB 2017: the 15th International Conference on Computational Methods in Systems Biology, Springer, 10545 (2017), p. 23 - 39
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M. Schoeberl, B. Cilku, D. Prokesch, P. Puschner: Best Practice for Caching of Single-Path Code
17th International Workshop on Worst-Case Execution Time Analysis (WCET 2017), Dubrovnik, Croatia; in: Proc. 17th International Workshop on Worst-Case Execution Time Analysis (WCET 2017), Dagstuhl, Germany (2017), ISBN: 978-3-95977-057-6, p. 1 - 12
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B. Cilku, W. Puffitsch, D. Prokesch, M. Schoeberl, P. Puschner: Improving Performance of Single-path Code Through a Time-predictable Memory Hierarchy
20th IEEE International Symposium on Real-Time Computing (ISORC 2017), Toronto, Canada; in: Proc. 20th IEEE International Symposium on Real-Time Computing (ISORC 2017), IEEE, 2017, ISBN: 978-1-5386-1574-4, p. 76 - 83
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A. Kinali, F. Huemer, C. Lenzen: Fault-tolerant Clock Synchronization with High Precision
2016 IEEE Computer Society Annual Symposium on VLSI, Pittsburgh, PA, USA; in: Proc. 2016 IEEE Computer Society Annual Symposium on VLSI, 2016, p. 490 - 495
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T. Polzer, A. Steininger: A General Approach for Comparing Metastable Behavior of Digital CMOS Gates
19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Kosice, Slovakia; in: Proc 19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2016, ISBN: 978-1-5090-2467-4; 6 pages
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S. Varadan, A. Steininger: Study of a Delayed Single-Event Effect in the Muller C-element
21st IEEE European Test Symposium, Amsterdam; in: Proc 21st IEEE European Test Symposium, 2016, ISBN: 978-1-4673-9659-2
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S. Varadan, A. Steininger: Design and Physical Implementation of a Target ASIC for SET Experiments
2016 Euromicro Conference on Digital System Design (DSD), Limassol, Portugal; in: Proc. 2016 Euromicro Conference on Digital System Design (DSD), IEEE, 2016, ISBN: 978-1-5090-2817-7, p. 694 - 697
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T. Polzer, F. Huemer, A. Steininger: A Programmable Delay Line for Metastability Characterization in FPGAs
24th Austrian Workshop on Microelectronics (Austrochip), Villach; in: Proceedings 24th Austrian Workshop on Microelectronics, 2016; 6 pages
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I. Konnov, J. Widder, F. Spegni, L. Spalazzi: Accuracy of Message Counting Abstraction in Fault-Tolerant Distributed Algorithms
Verification, Model Checking, and Abstract Interpretation (VMCAI), Paris; in: VMCAI 2017: Verification, Model Checking, and Abstract Interpretation, Springer, LNCS/10145/Paris (2017), ISBN: 978-3-319-52233-3, p. 347 - 366
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I. Konnov, M. Lazić, V. Veith, J. Widder: A short counterexample property for safety and liveness verification of fault-tolerant distributed algorithms
44th ACM SIGPLAN Symposium on Principles of Programming Languages (POPL), Paris, France; in: POPL, ACM, Paris (2017), ISBN: 978-1-4503-4660-3, p. 719 - 734
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F. Huemer, J. Lechner, A. Steininger: A New Coding Scheme for Fault Tolerant 4-Phase Delay-Insensitive Codes
2016 IEEE International Conference on Computer Design, Phoenix, Arizona, USA; in: Proceedings 2016 IEEE International Conference on Computer Design, 2016, ISBN: 978-1-5090-5142-7, p. 392 - 395
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J. Schumann, P. Moosbrugger, K. Rozier: R2U2: Monitoring and Diagnosis of Security Threats for Unmanned Aerial Systems
RV 2015, the 6th International Conference on Runtime Verification, Vienna, Austria; in: Proc. of RV 2015, the 6th International Conference on Runtime Verification, Springer, 9333 (2015), p. 233 - 249
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J. Schumann, P. Moosbrugger, K. Rozier: Runtime Analysis with R2U2: A Tool Exhibition Report
7th International Conference on Runtime Verification, Madrid; in: Runtime Verification - 16th International Conference, RV 2016, Madrid, Spain, September 23-30, 2016, Proceedings, Springer International Publishing, 10012 (2016), ISSN: 0302-9743, p. 504 - 509
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G. Wang, R. Grosu: Milling-Tool Wear-Condition Prediction with Statistic Analysis and Echo-State Networks
S2M'16: the International Conference on Sustaniable Smart Manufacturing, Lisbon, Portugal; in: Proceedings of S2M'16, the International Conference on Sustaniable Smart Manufacturing, Taylor & Francis, 2016
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P. Bogdan, P. Pande, H. Amrouch, M. Shafique, J. Henkel (invited): Power and Thermal Management in Massive Multicore Chips: Theoretical Foundation meets Architectural Innovation and Resource Allocation
International Conference on Compilers, Architecture and Synthesis for Embedded Systems [CASES 07], Pittsburgh, Pennsylvania, USA; in: CASES, ACM, 2016, ISBN: 978-1-4503-4482-1
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S. Rehman, W. El-Harouni, M. Shafique, A. Kumar, J. Henkel: Architectural-Space Exploration of Approximate Multipliers
The IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Austin, TX, USA; in: ICCAD, ACM New York, NY, USA, 2016, ISBN: 978-1-4503-4466-1
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A. Steininger, R. Najvirt, J. Maier: Does Cascading Schmitt-Trigger Stages Improve the Metastable Behavior?
2016 Euromicro Conference on Digital System Design (DSD), Limassol, Portugal; in: 2016 Euromicro Conference on Digital System Design (DSD), IEEE, 2016, ISBN: 978-1-5090-2817-7, p. 372 - 379
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A. Steininger, J. Maier, R. Najvirt: The Metastable Behavior of a Schmitt-Trigger
22nd IEEE International Symposium on Asynchronous Circuits and Systems, Porto Alegre -- Brazil; in: 2016 22nd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), IEEE Computer Society Conference Publishing Services (CPS), 2016, ISBN: 978-1-4673-9007-1, p. 57 - 64
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A. Islam, G. Byrne, S. Kong, E. Clarke, R. Cleaveland, F. Fenton, R. Grosu, P. Jones, S. Smolka: Bifurcation Analysis of Cardiac Alternans using Delta-Decidability
CMSB 2016: 14th International Conference on Computational Methods in Systems Biology, Cambridge, UK; in: Proceedings of CMSB'16, the 14th International Conference on Computational Methods in Systems Biology, LNCS, Springer, Lecture Notes in Computer Science, Vol. 9859, Cambridge, UK (2016), ISBN: 978-3-319-45176-3, p. 132 - 146
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W. Wallner, A. Wasicek, R. Grosu: A simulation framework for IEEE 1588
2016 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication, Stockholm, Sweden; in: Proceedings of IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication, IEEE, 2016, ISSN: 1949-0313, p. 1 - 6
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K. Selyunin, T. Nguyen, A.D. Basa, E. Bartocci, D. Nickovic, R. Grosu: Applying High-Level Synthesis for Synthesizing Hardware Runtime STL Monitors of Mission-Critical Properties
Design and Verification Conference and Exhibition, San Jose, USA; in: Design and Verification Conference and Exhibition, Online, 2016; 8 pages
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M. Lazić, I. Konnov, V. Veith, J. Widder (invited): Model Checking of Threshold-based Fault-Tolerant Distributed Algorithms
7th Workshop on Program Semantics, Specification and Verification: Theory and Applications, St. Petersburg, Russia
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I. Konnov, M. Lazić, V. Veith, J. Widder: Parameterized Verification of Liveness of Distributed Algorithms
Workshop on Formal Reasoning in Distributed Algorithms (FRiDA), Marrakech, Marocco
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U. Schmid (invited): Reconciling Fault-Tolerance and Robustness ?
Workshop on Design and Analysis of Robust Systems @ CPS-Week 2016, Hofburg Vienna, Austria
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U. Schmid (invited): Easy Impossibility Proofs for k-Set Agreement
Dagstuhl Seminar #16282 Topological Methods in Distributed Computing, Schloss Dagstuhl--Leibniz-Zentrum fuer Informatik
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D. Pfleger, U. Schmid: A Framework for Connectivity Monitoring in Wireless Sensor Networks
10th International Conference on Sensor Technlogies and Applications (SENSORCOMM'16), Nice, France; in: Proceedings 10th International Conference on Sensor Technlogies and Applications (SENSORCOMM'16), IARIA XPS Press, 2016, ISBN: 978-1-61208-490-9, p. 40 - 48
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B. Charron-Bost, M Függer, T. Nowak: Fast, Robust, Quantizable Approximate Consensus
International Colloquium on Automata, Languages and Programming (ICALP), Rome, Italy; in: Proceedings 43rd International Colloquium on Automata, Languages, and Programming (ICALP'16), Leibniz International Proceedings in Informatics (LIPIcs), 2016, ISBN: 978-3-95977-013-2, p. 1 - 14
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M. Schwarz, K. Winkler, U. Schmid: Fast Consensus Under Eventually Stabilizing Message Adversaries
17th International Conference on Distributed Computing and Networking, Singapore; in: Proceedings of the 17th International Conference on Distributed Computing and Networking, ACM, 2016, ISBN: 978-1-4503-4032-8, p. 1 - 10
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A. Islam, Q. Wang, R. M. Hasani, O. Balún, E. Clarke, R. Grosu, S. Smolka: Probabilistic Reachability Analysis of the Tap Withdrawal Circuit in Caenorhabditis elegans
18th IEEE International High-Level Design Validation and Test Workshop (HLDVT) 2016, Santa Cruz, California, U.S.A.; in: 18th IEEE International High-Level Design Validation and Test Workshop, IEEE, 2016, ISSN: 2471-7827, p. 170 - 177
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R. M. Hasani, L. Esterle, R. Grosu: Investigations on the Nervous System of Caenorhabditis elegans
Current AI Research in Austria (CAIRA) Workshop at the 39th German conference on Artificial Intelligence, Klagenfurt
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R. M. Hasani, D. Haerle, R. Grosu: Efficient Modeling of Complex Analog Integrated Circuits Using Neural Networks
12th Conference on PhD Research in Microelectronics and Electronics (PRIME) 2016, Lisbon, Portugal; in: Proc. of PRIME 2016: 12th conference on PhD research on microelectronics and electronics, IEEE, 2016, ISBN: 978-1-5090-0493-5, p. 1 - 4
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P. Puschner, B. Frömel: Composable Component Interfaces for Time-Triggered Systems
12th International IEEE/IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS 2016), York, UK; in: Proc. 19th IEEE International Symposium on Real-Time Computing (ISORC 2016) Workshops, 2016
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P. Puschner, B. Cilku, D. Prokesch: Constructing Time-Predictable MPSoCs: Avoid Conflicts in Temporal Control
IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, Lyon, Frankreich; in: Proceedings IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016 IEEE 10th International Symposium on Embedded Multicore/Many-core Systems on Chip; ISBN 978-1-5090-3530-4, 2016, ISBN: 978-1-5090-3530-4, p. 321 - 328
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T. Nguyen, E. Bartocci, D. Nickovic, R. Grosu, S. Jaksic, K. Selyunin (invited): The HARMONIA project: Hardware Monitoring for Automotive Systems-of-Systems
Leveraging Applications of Formal Methods, Verification and Validation: Foundational Techniques - 7th International Symposium, ISoLA 2016, Imperial, Corfu, Greece, October 10-14, 2016, Proceedings, Part I, Corfú, Greece; in: Leveraging Applications of Formal Methods, Verification and Validation: Foundational Techniques - 7th International Symposium, ISoLA 2016, Imperial, Corfu, Greece, October 10-14, 2016, Proceedings, Part I, Springer International Publishing, 9952 (2016), ISBN: 978-3-319-47166-2, p. 371 - 379
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E. Bartocci, Y. Falcone (invited): Runtime Verification and Enforcement, the (Industrial) Application Perspective (Track Introduction)
Leveraging Applications of Formal Methods, Verification and Validation: Foundational Techniques - 7th International Symposium, ISoLA 2016, Imperial, Corfu, Greece, October 10-14, 2016, Proceedings, Part I, Corfú, Greece; in: Leveraging Applications of Formal Methods, Verification and Validation: Foundational Techniques - 7th International Symposium, ISoLA 2016, Imperial, Corfu, Greece, October 10-14, 2016, Proceedings, Part I, Springer International Publishing, 9952 (2016), ISBN: 978-3-319-47166-2, p. 333 - 338
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H. Kong, E. Bartocci, S. Bogomolov, R. Grosu, T. Henzinger, Y. Jiang, C. Schilling: Discrete Abstraction of Multiaffine Systems
Hybrid Systems Biology - 5th International Workshop, HSB 2016, Grenoble, France, October 20-21, 2016, Proceedings, Grenoble, France; in: Hybrid Systems Biology - 5th International Workshop, HSB 2016, Grenoble, France, October 20-21, 2016, Proceedings, Springer International Publishing, 9957 (2016), ISBN: 978-3-319-47151-8, p. 128 - 144
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K. Kalajdzic, C. Jegourel, A. Legay, E. Bartocci, A. Lukina, S. Smolka, R. Grosu: Model Checking as Control: Feedback Control for Statistical Model Checking of Cyber-Physical Systems
Leveraging Applications of Formal Methods, Verification and Validation: Foundational Techniques - 7th International Symposium, ISoLA 2016, Imperial, Corfu, Greece, October 10-14, 2016, Proceedings, Part I, Corfú, Greece; in: Leveraging Applications of Formal Methods, Verification and Validation: Foundational Techniques - 7th International Symposium, ISoLA 2016, Imperial, Corfu, Greece, October 10-14, 2016, Proceedings, Part I, Springer International Publishing, 9952 (2016), ISBN: 978-3-319-47166-2, p. 46 - 61
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K. Selyunin, T. Nguyen, E. Bartocci, D. Nickovic, R. Grosu: Monitoring of MTL Specifications With IBM's Spiking-Neuron Model
Proc. of the 2016 Design, Automation & Test in Europe Conference & Exhibition, Dresden; in: Proc. of the 2016 Design, Automation & Test in Europe Conference & Exhibition, IEEE Computer Society, 2016, ISBN: 978-3-9815-3707-9, p. 924 - 929
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A. Gurung, D. Kumar, E. Bartocci, S. Bogomolov, R. Grosu, R. Ray: Parallel Reachability Analysis for Hybrid Systems
Proc. of MEMOCODE 2016: the 14th ACM-IEEE International Conference on Formal Methods and Models for System Design, ACM, 2016, Kanpur, India; in: Proc. of MEMOCODE 2016: the 14th ACM-IEEE International Conference on Formal Methods and Models for System Design, ACM, 2016, 2016, p. 12 - 22
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A. Rodionova, E. Bartocci, D. Nickovic, R. Grosu: Temporal Logic as Filtering
Proceeding HSCC '16 - the 19th International Conference on Hybrid Systems: Computation and Control, Vienna; in: Proceeding HSCC '16 - Proceedings of the 19th International Conference on Hybrid Systems: Computation and Control, ACM, 2016, ISBN: 978-1-4503-3955-1, p. 11 - 20
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E. Bartocci, L. Bortolussi, T. Brazdil, M. Dimitrios, G. Sanguinetti: Policy learning for time-bounded reachability in Continuous-Time Markov Decision Processes via doubly-stochastic gradient ascent
Quantitative Evaluation of Systems - 13th International Conference, QEST 2016, Quebec City, QC, Canada, August 23-25, 2016, Proceedings, Quebec City, QC, Canada; in: Quantitative Evaluation of Systems - 13th International Conference, QEST 2016, Quebec City, QC, Canada, August 23-25, 2016, Proceedings, Springer International Publishing, 9826 (2016), ISBN: 978-3-319-43424-7, p. 244 - 259
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S. Jaksic, E. Bartocci, R. Grosu, D. Nickovic: Quantitative Monitoring of STL with Edit Distance
7th International Conference on Runtime Verification, Madrid; in: Runtime Verification - 16th International Conference, RV 2016, Madrid, Spain, September 23-30, 2016, Proceedings, Springer International Publishing, 10012 (2016), ISSN: 0302-9743, p. 201 - 218
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K. Selyunin, T. Nguyen, E. Bartocci, R. Grosu: Applying Runtime Monitoring for Automotive Electronic Development
7th International Conference on Runtime Verification, Madrid; in: Runtime Verification - 16th International Conference, RV 2016, Madrid, Spain, September 23-30, 2016, Proceedings, Springer International Publishing, 10012 (2016), ISSN: 0302-9743, p. 462 - 469
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H. Isakovic, R. Grosu: A heterogeneous time-triggered architecture on a hybrid system-on-a-chip platform
2016 IEEE 25th International Symposium on Industrial Electronics (ISIE), Santa Clara, CA, USA; in: IEEE 25th International Symposium on Industrial Electronics (ISIE), IEEE, 2016, ISSN: 2163-5145, p. 244 - 253
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I. Konnov, V. Veith, J. Widder (invited): What You Always Wanted to Know About Model Checking of Fault-Tolerant Distributed Algorithms
Perspectives of System Informatics: 10th International Andrei Ershov Informatics Conference, Kazan, Russland; in: Perspectives of System Informatics: 10th International Andrei Ershov Informatics Conference, PSI 2015, LNCS / Springer, 9609 (2016), p. 6 - 21
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M. Zeiner, M. Schwarz, K. Winkler, U. Schmid: Broadcasting in Random Trees
ALEA in Europe - Young Researchers Workshop, TU Wien
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A. Murthy, A. Islam, S. Smolka, R. Grosu: Computing Bisimulation Functions using SOS Optimisation and delta-decidability over the Reals
18th International Conference on Hybrid Systems: Computation and Control (HSCC), Seattle, USA; in: HSCC 2015, ACM, 2015, ISBN: 978-1-4503-3433-4, p. 78 - 87
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S Hepp, B. Huber, J. Knoop, D. Prokesch, P. Puschner: The platin Tool Kit - The T-CREST Approach for Compiler and WCET Integration
18. Kolloquium Programmiersprachen und Grundlagen der Programmierung (KPS) 2015, Pörtschach am Wörthersee; in: 18. Kolloquium Programmiersprachen und Grundlagen der Programmierung (KPS) 2015, 2015
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D. Prokesch, P. Puschner: A Strategy for Generating Time-Predictable Code
18. Kolloquium Programmiersprachen und Grundlagen der Programmierung (KPS) 2015, Pörtschach am Wörthersee; in: 18. Kolloquium Programmiersprachen und Grundlagen der Programmierung (KPS) 2015, 2015
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B. Cilku, D. Prokesch, P. Puschner: A Time-Predictable Instruction-Cache Architecture that Uses Prefetching and Cache Locking
11th International IEEE/IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems SEUS 2015, Auckland, New Zealand; in: Proc. 18th IEEE International Symposium on Real-Time Computing (ISORC 2015) Workshops, IEEE, 2015, ISBN: 978-1-4673-7709-6, p. 74 - 79
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D. Prokesch, S Hepp, P. Puschner: A Generator for Time-Predictable Code
18th IEEE International Symposium on Real-Time Computing (ISORC 2015), Auckland, New Zealand; in: Proc. 18th IEEE International Symposium on Real-Time Computing (ISORC 2015), IEEE, 2015, ISBN: 978-1-4799-8781-8, p. 27 - 34
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R. Najvirt, A. Steininger: A Versatile and Reliable Glitch Filter for Clocks
25th International Workshop on Power and Timing Modeling, Optimization and Simulation, Salvador, Brasilien; in: 25th International Workshop on Power and Timing Modeling, Optimization and Simulation, 2015; 8 pages
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S. Varadan, A. Steininger: Can we trust SET Injection Models?
MEDIAN Finale Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale, Tallinn, Estonia; in: MEDIAN Finale Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale, 2015; 6 pages
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J. Lechner, A. Steininger, F. Huemer: Methods for Analysing and Improving the Fault Resilience of Delay-Insensitive Codes
33rd IEEE International Conference on Computer Design, New York City, USA; in: 33rd IEEE International Conference on Computer Design, 2015; 8 pages
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R. Najvirt, A. Steininger: A Pausible Clock with Crystal Oscillator Accuracy
22nd European Conference on Circuit Theory and Design, Trondheium, Norwegen; in: 22nd European Conference on Circuit Theory and Design, 2015; 4 pages
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S. Varadan, A. Steininger: Reliable and Continuous Measurement of SET Pulse Widths
18th Euromicro Conference on Digital System Design, Funchal, Portugal; in: 18th Euromicro Conference on Digital System Design, 2015; 8 pages
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T. Polzer, A. Steininger: Enhanced Metastability Characterization based on AC Analysis
18th Euromicro Conference on Digital System Design, Funchal, Portugal; in: 18th Euromicro Conference on Digital System Design, 2015; 9 pages
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T. Polzer, A. Steininger: Measuring the Distribution of Metastable Upsets over Time
18th Euromicro Conference on Digital System Design, Funchal, Portugal; in: Measuring the Distribution of Metastable Upsets over Time, 2015; 8 pages
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R. Najvirt, T. Polzer, F. Beck, A. Steininger: Containment of Metastable Voltages in FPGAs
18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Belgrad; in: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2015; 6 pages
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F. Huemer, M. Schütz, A. Steininger: Revisiting Sorting Network based Completion Detection for 4 Phase Delay Insensitive Codes
Austrochip Workshop on Microelectronics, Wien; in: Austrochip Workshop on Microelectronics, 2015; 6 pages
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M. Schütz, F. Huemer, A. Steininger: A Practical Comparison of 2-Phase Delay Insensitve Communication Protocols
Austrochip Workshop on Microelectronics, Wien; in: Austrochip Workshop on Microelectronics, 2015; 6 pages
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R. Najvirt, A. Steininger: How to Synchronize a Pausible Clock to a Reference
21st IEEE International Symposium on Asynchronous Circuits and Systems, Mountain View, CA; in: 21st IEEE International Symposium on Asynchronous Circuits and Systems, 2015; 8 pages
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R. Najvirt, M Függer, T. Nowak, U. Schmid, M. Hofbauer, K. Schweiger: Experimental Validation of a Faithful Binary Circuit Model
Great Lakes Symposium on VLSI (GLSVLSI'15), Pittsburgh, Pennsylvania, USA; in: Proceedings of the 25th Edition on Great Lakes Symposium on VLSI (GLSVLSI'15), 2015, ISBN: 978-1-4503-3474-7, p. 355 - 360
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M Függer, R. Najvirt, T. Nowak, U. Schmid: Towards binary circuit models that faithfully capture physical solvability
Design, Automation & Test in Europe Conference & Exhibition (DATE'15), Grenoble, France; in: Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE'15), 2015, ISBN: 978-3-9815370-4-8, p. 1455 - 1460
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H. Kopetz (invited): From Embedded Systems to System of Systems
ITASC Workshop: Intelligent Transportation and Smart City, Shanghai
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H. Kopetz (invited): Simplification Principles in the Design of Cyber-Physical System-of-Systems
Sixth International Conference on Complex Systems Design & Management, CSD&M 2015, Paris; in: Complex Systems Design & Management, Springer International Publishing, 2015, ISBN: 978-3-319-26109-6, p. 39 - 51
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M. Mori, A. Ceccarelli, P. Lollini, A. Bondavalli, B. Frömel: A holistic viewpoint-based SysML Profile to Design Systems-of-Systems
17th IEEE International Symposium on High Assurance Systems Engineering, Orlando, Florida, USA; in: High Assurance Systems Engineering (HASE), 2016 IEEE 17th International Symposium on, 2016, ISSN: 1530-2059, p. 276 - 283
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H. Kopetz, O. Höftberger, B. Frömel, F. Brancati, A. Bondavalli: Towards an Understanding of Emergence in Systems-of-Systems
10th Annual Systems of Systems Engineering Conference 2015, San Antonio, TX, USA; in: 10th Annual Systems of Systems Engineering Conference 2015, 2015, p. 214 - 219
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H. Kopetz, B. Frömel, O. Höftberger: Direct versus Stigmergic Information Flow in Systems-of-Systems
10th Annual Systems of Systems Engineering Conference 2015, San Antonio, TX, USA; in: 10th Annual Systems of Systems Engineering Conference 2015, 2015, p. 36 - 41
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M. Biely, P. Robinson, U. Schmid, M. Schwarz, K. Winkler: Gracefully Degrading Consensus and k-Set Agreement in Directed Dynamic Networks
The international Conference on NETworked sYStems, Agadir, Marokko; in: NETYS2015, Springer LNCS, 9466 (2015), ISBN: 978-3-319-26849-1
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K. Selyunin, D. Ratasich, E. Bartocci, A. Islam, S. Smolka, R. Grosu: Neural Programming: Towards Adaptive Control in Cyber-Physical Systems
54th IEEE Conference on Decision and Control, Osaka, Japan; in: Proc. of CDC 2015: the 54th IEEE Conference on Decision and Control, IEEE Computer Society, 2015, ISBN: 978-1-4799-7884-7, p. 6978 - 6985
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S. Jaksic, E. Bartocci, R. Grosu, R. Kloibhofer, T. Nguyen, D. Nickovic: From Signal Temporal Logic to FPGA Monitors
13th ACM-IEEE International Conference on Formal Methods and Models for System Design, Austin, TX, USA; in: Proc. of MEMOCODE 2015: the 13th ACM-IEEE International Conference on Formal Methods and Models for System Design, IEEE, 2015, p. 218 - 227
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S. Bogomolov, C. Schilling, E. Bartocci, G. Batt, H. Kong, R. Grosu: Abstraction-based Parameter Synthesis for Multiaffine Systems
the 11th Haifa Verification Conference (HVC), Haifa, Israel; in: Proc. of HVC 2015: the 11th Haifa Verification Conference, LNCS / Springer, 9434 (2015), ISBN: 978-3-319-26286-4, p. 19 - 35
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R. Rajarshi, G. Amit, D. Binayak, E. Bartocci, S. Bogomolov, R. Grosu: XSpeed: Accelerating Reachability Analysis on MultiCore Processors
the 11th Haifa Verification Conference (HVC), Haifa, Israel; in: Proc. of HVC 2015: the 11th Haifa Verification Conference, Haifa, Israel, November, 2015, LNCS / Springer, 9434 (2015), ISBN: 978-3-319-26286-4, p. 3 - 18
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E. Bartocci, L. Bortolussi, M. Dimitrios, L. Nenzi, G. Sanguinetti: Studying Emergent Behaviours in Morphogenesis using Signal Spatio-Temporal Logic
4th International Workshop on Hybrid Systems Biology (HSB), Madrid; in: Proc. of HSB 15: the 4th International Workshop on Hybrid Systems Biology, LNCS / LNBI / Springer, vol. 9271 (2015), p. 1 - 17
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B. Cilku, A. Crespo, P. Puschner, J. Coronel, P. Salvador: A TDMA-Based arbitration scheme for mixed-criticality multicore platforms
The first international conference on Event-based Control, Communication, and Signal Processing (EBCCSP), 2015, Krakow, Poland; in: Event-based Control, Communication, and Signal Processing (EBCCSP), 2015, IEEE, 2015, p. 1 - 6
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L. Musat, S. Kandl, P. Puschner, M. Hübl, A. Buzo, G. Pelz: Requirement Semi-formalization Methodology for SoC Design (Best Paper Award)
12th International SoC Design Conference (ISOCC 2015), Gyeongju, South Korea; in: Proceedings of the 12th International SoC Design Conference (IEEE), 2015
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D. Phan, J. Yang, D. Ratasich, R. Grosu, S. Smolka, S. Stoller: Collision Avoidance for Mobile Robots with Limited Sensing in Unknown Environments
RV 2015, the 6th International Conference on Runtime Verification, Vienna; in: Runtime Verification, 6th International Conference (RV 2015), Springer, 9333 (2015), ISBN: 978-3-319-23819-7, p. 201 - 215
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D. Ratasich, B. Frömel, O. Höftberger, R. Grosu: Generic Sensor Fusion Package for ROS
2015 IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS), Hamburg; in: Intelligent Robots and Systems (IROS), 2015 IEEE/RSJ International Conference on, IEEE, 2015, p. 286 - 291
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I. Konnov, V. Veith, J. Widder: SMT and POR beat Counter Abstraction: Parameterized Model Checking of Threshold-Based Distributed Algorithms
International Conference on Computer Aided Verification (CAV), San Francisco, CA, USA; in: Computer Aided Verification, LNCS Springer, 9206 (2015), ISBN: 978-3-319-21689-8, p. 85 - 102
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M. Zeiner, M Függer, T. Nowak, U. Schmid: Optimal Strategies for Repeated Leader Election
Joint Austrian-Hungarian Mathematical Conference 2015, Györ
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E. Bartocci, R. Grosu, P. Katsaros, C. Ramakrishnan, S. Smolka: Model Repair for Probabilistic Systems
17th International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS), Saarbrücken, Germany; in: Proc. of 17th International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS), LNCS / Springer, vol. 6605 (2011), ISBN: 978-3-642-19834-2, p. 326 - 340
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A. Murthy, E. Bartocci, F. Fenton, J. Glimm, R. Gray, S. Smolka, R. Grosu: Curvature analysis of cardiac excitation wavefronts
CMSB 2011: the 9th ACM International Conference on Computational Methods in Systems Biology, Paris, France; in: Proc. of CMSB 2011: the 9th ACM International Conference on Computational Methods in Systems Biology, ACM, 2011, ISBN: 978-1-4503-0817-5, p. 103 - 112
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E. Bartocci, E. Cherry, J. Glimm, R. Grosu, S. Smolka: Toward real-time simulation of cardiac dynamics
CMSB 2011: the 9th ACM International Conference on Computational Methods in Systems Biology, Paris, France; in: Proc. of CMSB 2011: the 9th ACM International Conference on Computational Methods in Systems Biology, ACM, 2011, ISBN: 978-1-4503-0817-5, p. 103 - 112
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R. Grosu, G. Batt, F. Fenton, J. Glimm, C. Le Guernic, S. Smolka, E. Bartocci: From Cardiac Cells to Genetic Regulatory Network
CAV 2011: the 23rd International Conference on Computer Aided Verification, Snowbird, UT, USA; in: CAV 2011: the 23rd International Conference on Computer Aided Verification, LNCS / Springer, vol. 6806 (2011), ISSN: 0302-9743, p. 396 - 411
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S. Stoller, E. Bartocci, J. Seyster, R. Grosu, K Havelund, S. Smolka, E. Zadok: Runtime Verification with State Estimation
RV 2011: Proc. of the 2nd International Conference on Runtime Verification, San Francisco (CA), USA; in: RV 2011: Proc. of the 2nd International Conference on Runtime Verification, LNCS / Springer Berlin Heidelberg, vol. 7186 (2012), ISBN: 978-3-642-29859-2, p. 193 - 207
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I. Haghighi, A. Jones, J. Kong, E. Bartocci, R. Grosu, C. Belta: SpaTeL: A Novel Spatial-Temporal Logic and Its Applications to Networked Systems
18th International Conference on Hybrid Systems: Computation and Control (HSCC), Seattle, USA; in: Proc. of HSCC 2015: the 18th International Conference on Hybrid Systems: Computation and Control, ACM, 2015, ISBN: 978-1-4503-3433-4, p. 189 - 198
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S. Kandl (invited): Applicability of Structural Code Coverage Metrics for Safety-Critical Systems
AUTOSAR Safety-Group (WP 1.3) Meeting, Paris, France
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S. Kandl (invited): How Mutations Can Help to Prove That Your System Does Not Contain (Unwanted) Mutations
Design, Automation and Test in Europe Conference (DATE), Grenoble, France; in: DATE 2015 - M04 Embedded Systems: Functional Qualification: Applications in the C/C++ Domain, 2015
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S. Kandl et al.: Applicability of Formal Methods for Safety-Critical Systems in the Context of ISO 26262
Safety-critical Systems Symposium (SSS 2015), Bristol, UK; in: Engineering Systems for Safety: Proceedings of the Twenty-third Safety-critical Systems Symposium, M. Parson, T. Anderson (ed.); 2015, ISBN: 978-1505689082, p. 95 - 115
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D. Prokesch: Single-Path Code Generation for the Patmos Processor
TACLe 5th Joint WG/MC Meeting, Amsterdam, Niederlande
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A. Pavlogiannis, K. Chatterjee, U. Schmid, A. Kößler: A Framework for Automated Competitive Analysis of On-line Scheduling of Firm-Deadline Tasks
35th IEEE Real-Time Systems Symposium, Rome; in: Proccedings IEEE Real-Time Systems Symposium (RTSS'14), 2014, ISSN: 1052-8725, p. 118 - 127
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P. Degasperi, S Hepp, W. Puffitsch, M. Schöberl: A Method Cache for Patmos
17th IEEE International Symposium on Object/Component-Oriented Real-Time Distributed Computing (ISORC), Reno, Nevada, USA; in: Proc. of the 17th IEEE International Symposium on Object/Component-Oriented Real-Time Distributed Computing, 2014, ISSN: 1555-0885, p. 100 - 108
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M. Schwarz, K. Winkler, U. Schmid, M. Biely, P. Robinson: Brief Announcement: Gracefully Degrading Consensus and k-Set Agreement under Dynamic Link Failures
33th ACM SIGACTSIGOPS Symposium on Principles of Distributed Computing (PODC), Paris, France; in: Proceedings of the 33th ACM SIGACTSIGOPS Symposium on Principles of Distributed Computing, ACM, 2014, p. 341 - 343
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B. Huber, S Hepp, M. Schöberl: Scope-based Method Cache Analysis
14th International Workshop on Worst-Case Execution Time Analysis (WCET 2014), Madrid; in: 14th International Workshop on Worst-Case Execution Time Analysis, OpenAccess Series in Informatics (OASIcs), 2014, ISBN: 978-3-939897-69-9, p. 73 - 82
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S Hepp, B. Huber, D. Prokesch: platin -­ A Toolkit for Compiler and WCET-Analysis Integration
TACLe Focused Meeting Day on Flow Facts and Annotation Formats, Technical University of Denmark
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D. Prokesch: Single-Path Code Generation and Input-Data Dependence Analysis
T-CREST/parMERASA/CERTAINTY Workshop, Madrid
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R. Najvirt, A. Steininger: Equivalence of Clock Gating and Synchronization with Applicability to GALS Communication
24th International Workshop on Power and Timing Modeling, Optimization and Simulation, Isles Balears, Spain; in: Proceedings of the 24th International Workshop on Power and Timing Modeling, Optimization and Simulation, IEEE, 2014, ISBN: 978-1-4799-5412-4; 8 pages
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A. Steininger, S. Varadan, D. Alexandrescu, E. Costenaro, L. Anghel: Exploring the State Dependent SET Sensitivity of Asynchronous Logic - The Muller-Pipeline Example
2014 32nd IEEE International Conference on Computer Design (ICCD), Seoul, Korea; in: Proceedings of the 2014 32nd IEEE International Conference on Computer Design (ICCD), IEEE, 2014, ISBN: 978-1-4799-6492-5; 7 pages
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S. Varadan, A. Steininger: Long Term On-Chip Monitoring of SET Pulsewidths in a Fully Digital ASIC
22nd Austrian Workshop on Microelectronics, Graz; in: Proceedings of the 22nd Austrian Workshop on Micorelectronics, IEEE, 2014, ISBN: 978-1-4799-7243-2; 6 pages
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R. Grosu, S. Bogomolov, G. Frehse, M. Greitschus, C. Pasareanu, A. Podelski, T. Strump: Assume-Guarantee Abstraction-Refinement Meets Hybrid Systems
Haifa Verification Conference HVC 2014, Haifa, Isral; in: Proc. of HVC'14, the Haifa Verification Conference, 2014
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R. Grosu, D. Peled, C. Ramakrishnan, S. Smolka, S. Stoller, J. Yang: Using Statistical Model Checking for Measuring Systems
6th International Symposium On Leveraging Applications of Formal Methods, Verification and Validation (ISoLA 2014), Corfu; in: Proc. of ISoLA'14, the 6th International Symposium on Leveraging Applications of Formal Methods, Verification and Validation, 2014
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R. Grosu, A. Islam, A. Murthy, A. Girard, S. Smolka: Compositionality Results for Cardiac Cell Dynamics
HSCC'14, the 17th International Conference on Hybrid Systems: Computation and Conrol, Berlin; in: Proc. of HSCC'14, the 17th International Conference on Hybrid Systems: Computation and Control, 2014, ISBN: 978-1-4503-2732-9, p. 243 - 252
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I. Ariful, T. Deshpande, A. Murthy, E. Bartocci, S. Smolka, S. Stoller, R. Grosu: Tracking Action Potentials of Nonlinear Excitable Cells using Model Predictive Control
Sixth International Conference on Bioinformatics, Biocomputational Systems and Biotechnologies (BIOTECHNO), Chamonix, France; in: Proc. of BIOTECHNO 2014: The Sixth International Conference on Bioinformatics, Biocomputational Systems and Biotechnologies, IARIA, 2014, ISBN: 978-1-61208-335-3, p. 52 - 58
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E. Bartocci, R. DeFrancisco, S. Smolka: Towards a GPGPU-parallel SPIN model checker
21th International SPIN Symposium on Model Checking of Software, San Jose, California; in: SPIN 2014: International SPIN Symposium on Model Checking of Software, ACM, 2014, ISBN: 978-1-4503-2452-6, p. 87 - 96
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E. Bartocci, B. Bonakdarpour, Y. Falcone (invited): First International Competition of Software for Runtime Verification
14th International Conference on Runtime Verification, Canada; in: Proc. of RV 2014: the 14th International Conference on Runtime Verification, 2014, p. 1 - 9
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E. Bartocci, S. Gao, S. Smolka (invited): Medical Cyber-Physical Systems - (Track Introduction)
6th International Symposium On Leveraging Applications of Formal Methods, Verification and Validation (ISoLA 2014), Corfu; in: Proc. of ISoLA: the 6th International Symposium On Leveraging Applications of Formal Methods, Verification and Validation, 2014, p. 353 - 355
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S. Bufo, E. Bartocci, G. Sanguinetti, M. Borelli, U. Lucangelo, L. Bortolussi (invited): Temporal Logic based Monitoring of Assisted Ventilaion in Intensive Care Patients
6th International Symposium On Leveraging Applications of Formal Methods, Corfu', Greece; in: Proc. of ISoLA: 6th International Symposium On Leveraging Applications of Formal Methods, Verification and Validation, 2014, p. 391 - 403
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E. Bartocci, L. Bortolussi, G. Sanguinetti: Data-driven Statistical Learning of Temporal Properties
12th International Conference on Formal Modeling and Analysis of Timed Systems (FORMATS), Florence, Italy; in: Proc. of FORMATS 2014: the 12th International Conference on Formal Modeling and Analysis of Timed Systems, LNCS/Springer, vol. 8711 (2014), ISBN: 978-3-319-10511-6, p. 23 - 37
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E. Aydin Gol, E. Bartocci, C. Belta: A Formal Methods Approach to Pattern Synthesis in Reaction Diffusion Systems
53rd IEEE Inter. Conference on Decision and Control (CDC), Los Angeles; in: Proc. of CDC 2014: the IEEE 53rd Annual Conference on Decision and Control, IEEE, 2014, ISBN: 978-1-4799-7746-8, p. 108 - 113
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I. Ayestaran, Carlos Nicolas, J. Perez, A. Ortube, P. Puschner: Modeling and Simulated Fault Injection for Time-Triggered Safety-Critical Embedded Systems
17th IEEE International Symposium on Object/Component-Oriented Real-Time Distributed Computing (ISORC), Reno, Nevada, USA; in: Proceedings 17th IEEE Symposium on Object/Component/Service-oriented Real-time distributed Computing (ISORC), IEEE, 2014, ISSN: 1555-0885, p. 180 - 187
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I. Ayestaran, Carlos Nicolas, J. Perez, P. Puschner: Modeling Logical Execution Time Based Safety-Critical Embedded Systems in SystemC
The Third Mediterranean Conference on Embedded Computing (MECO), Budva, Montenegro; in: Proceedings 3rd Mediterranean Conference on Embedded Computing (MECO), IEEE, 2014, ISBN: 978-1-4799-4827-7, p. 77 - 80
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C. Schmittner, T. Gruber, P. Puschner, E. Schoitsch: Security Application of Failure Mode and Effect Analysis (FMEA)
International Conference on Computer Safety, Reliability and Security (SAFECOMP), Florence, Italy; in: Computer Safety, Reliability and Security, Lecture Notes in Computer Science / Springer, Volume 8666 (2014), ISBN: 978-3-319-10506-2, p. 310 - 325
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I. Ayestaran, Carlos Nicolas, J. Perez, A. Ortube, P. Puschner: A Simulated Fault Injection Framework for Time-Triggered Safety-Critical Embedded Systems
International Conference on Computer Safety, Reliability and Security (SAFECOMP), Florence, Italy; in: Computer Safety, Reliability and Security, Lecture Notes in Computer Science / Springer, Volume 8666 (2014), ISBN: 978-3-319-10506-2, p. 1 - 16
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P. Puschner (invited): Constructing Time-Critical Embedded Systems: Decide Before Runtime
Second Mediterranean Conference on Embedded Computing, Budva, Montenegro; in: Proceedings 2nd Mediterranean Conference on Embedded Computing (MECO), IEEE, 2013, ISBN: 978-9940-9436-1-5, p. 3
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P. Puschner (invited): Embedded Systems for Safety-Critical and Mixed-Criticality Applications
Second Mediterranean Conference on Embedded Computing, Budva, Montenegro; in: Proceedings 2nd Mediterranean Conference on Embedded Computing (MECO), IEEE, 2013, ISBN: 978-9940-9436-1-5, p. 15
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I. Ayestaran, Carlos Nicolas, J. Perez, A. Ortube, P. Puschner: A Novel Modeling Framework for Time-Triggered Safety-Critical Embedded Systems
Forum on specification & Design Languages (FDL), Munich, Germany; in: Proceedings of the Forum on Specification & Design Languages (FDL 2014), 2014
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B. Cilku, P. Puschner et al.: A Memory Arbitration Scheme for Mixed-Criticality Multicore Platforms
2 nd International Workshop on Mixed Criticality Systems (WMC14), Rome, Italy; in: Proceedings of the 2 nd International Workshop on Mixed Criticality Systems, 2014, p. 27 - 32
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B. Cilku, P. Puschner: Designing a Time-Predictable Memory Hierarchy for Single-Path Code
7 th International Workshop on Compositional Theory and Technology for Real-Time Embedded Systems (CRTS14), Rome, Italy; in: Designing a Time-Predictable Memory Hierarchy for Single-Path Code, 2014, p. 9 - 14
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B. Cilku, B. Frömel, P. Puschner: A Dual-Layer Bus Arbiter for Mixed-Criticality Systems with Hypervisors
12th IEEE International Conference on Industrial Informatics, Porto Alegre, Brazil; in: Proc. of the 12th IEEE International Conference on Industrial Informatics, 2014, ISBN: 978-1-4799-4906-9, p. 147 - 151
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H. Kopetz (invited): From Embedded Systems to Systems of Systems
27th International Conference on VLSI Design 2014, Mumbai, India
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W. Steiner, F. Bonomi, H. Kopetz: Towards synchronous deterministic channels for the Internet of Things
IEEE World Forum on Internet of Things 2014 (WF-IoT2014), Seoul, Korea; in: Proc. of the IEEE World Forum on Internet of Things 2014 (WF-IoT2014), IEEE, 2014, p. 433 - 436
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H. Kopetz (invited): Why a Global Time is Needed in a Dependable SoS
Engineering Dependable Systems of Systems (EDSoS) 2014, Newcastle upon Tyne, United Kingdom
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H. Kopetz (invited): From Embedded Systems to Systems of Systems
10th IEEE/IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS), Reno, Nevada, USA
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H. Kopetz (invited): Systems of Systems Need a Global Time
23rd NIST-ATIS Synchronization Workshop, San Jose, California, USA
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H. Kopetz: A Conceptual Model for the Information Transfer in System of Systems
17th IEEE International Symposium on Object/Component-Oriented Real-Time Distributed Computing (ISORC), Reno, Nevada, USA; in: Proc. of the 17th IEEE International Symposium on Object/Component-Oriented Real-Time Distributed Computing, 2014, ISSN: 1555-0885, p. 17 - 24
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A. Wasicek, O. Höftberger, M. Elshuber, H. Isakovic, A Fleck: Virtual CAN Lines in an Integrated MPSoC Architecture
17th IEEE International Symposium on Object/Component-Oriented Real-Time Distributed Computing (ISORC), Reno, Nevada, USA; in: Proc. of the 12th IEEE International Conference on Industrial Informatics, 2014, ISSN: 1555-0885, p. 158 - 165
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L. Musat, M. Hübl, A. Buzo, G. Pelz, S. Kandl, P. Puschner: Semi-formal Representation of Requirements for Automotive Solutions using SysML
Forum on specification & Design Languages (FDL), Munich, Germany; in: Proceedings of the Forum on Specification & Design Languages (FDL 2014), 2014
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S. Kandl, J. Forey: Fault-Detection Sensitivity Based Assessment of Test Sets for Safety-Relevant Software (Best Paper Award)
Seventh International Conference on Dependability (DEPEND 2014), Lisbon, Portugal; in: Proceedings of the Seventh International Conference on Dependability (DEPEND 2014), 2014, ISBN: 978-1-61208-378-0
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D. Prokesch, B. Huber, P. Puschner: Towards Automated Generation of Time-Predictable Code
14th International Workshop on Worst-Case Execution Time Analysis (WCET 2014), Madrid; in: 14th International Workshop on Worst-Case Execution Time Analysis, Dagstuhl, Germany (2014), ISBN: 978-3-939897-69-9, p. 103 - 112
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S. Kandl: Cost Effectiveness of Coverage-Guided Test-Suite Reduction for Safety-Relevant Systems
Twenty-Third International Conference on Systems Engineering (ICSEng 2014), Las Vegas, Nevada, USA; in: Proceedings of the Twenty-Third International Conference on Systems Engineering (ICSEng 2014), 2014
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O. Höftberger, R. Obermaisser: Runtime Evaluation of Ontology-based Reconfiguration of Distributed Embedded Real-Time Systems
12th IEEE International Conference on Industrial Informatics, Porto Alegre, Brazil; in: Proc. of the 12th IEEE International Conference on Industrial Informatics, 2014, ISBN: 978-1-4799-4906-9, p. 544 - 550
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S. Kandl, M. Elshuber: A Formal Approach to System Integration Testing
Tenth European Dependable Computing Conference (EDCC 2014), Newcastle upon Tyne, UK; in: Proceedings of the Tenth European Dependable Computing Conference (EDCC 2014), 2014
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S. Naqvi, A. Steininger: A Tree Arbiter Cell for High Speed Resource Sharing in Asynchronous Environments
Design Automation &Test in Europe Conference and Exhibition 2014 (DATE 14), Dresden, Deutschland; in: Proceedings Design Automation &Test in Europe, 2014, ISBN: 978-3-9815370-2-4; 6 pages
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J. Maier, A. Steininger: Online Test Vector Insertion: A Concurrent Built-In Self-Testing (CBIST) Approach for Asynchronous Logic
17th Symposium on Design and Diagnosis of Electronic Circuits and Systems (DDECS 2014), Warschau, Polen; in: Design and Diagnostics of Electronic Circuits Systems (DDECS), 2014 IEEE 17th International Symposium on, 2014; 6 pages
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L. Anghel, S. Varadan, D. Alexandrescu, A. Steininger, K. Schneider, E. Costenaro: Single Event Effects in Muller C-Elements and Asynchronous Circuits Over a Wide Energy Spectrum
2014 IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE 10), Stanford University, USA; in: Proceedings 2014 IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE 10), 2014; 6 pages
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S. Varadan, A. Steininger: Diagnosis of SET Propagation in Combinational Logic under Dynamic Operation
2014 IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE 10), Stanford University, USA; in: Proceedings 2014 IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE 10), 2014; 6 pages
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S. Varadan, A. Steininger: Architecture for Monitoring SET Propagation in 16-bit Sklansky Adder
15th International Symposium & Exhibit on Quality Electronic Design, Santa Clara, USA; in: Proceedings 15th International Symposium & Exhibit on Quality Electronic Design, 2014, ISBN: 978-1-4799-3946-6; 8 pages
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S. Varadan, A. Steininger, U. Schmid: Measuring SET Pulsewidths in Logic Gates using Digital Infrastructure
15th International Symposium & Exhibit on Quality Electronic Design, Santa Clara, USA; in: Proceedings 15th International Symposium & Exhibit on Quality Electronic Design, 2014, ISBN: 978-1-4799-3946-6; 7 pages
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S. Naqvi, J. Lechner, A. Steininger: Protection of Muller-Pipelines from Transient Faults
15th International Symposium & Exhibit on Quality Electronic Design, Santa Clara, USA; in: Proceedings 15th International Symposium & Exhibit on Quality Electronic Design, 2014, ISBN: 978-1-4799-3946-6; 9 pages
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S. Kandl, M. Elshuber, P. Puschner: Formal Verification at System Level
HiPEAC 2014 (International Conference on High-Performance and Embedded Architectures and Compilers), Vienna
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O. Melnychenko, H.-P. Kreuter: Interfacing UVM Test Bench and Laboratory Equipment for Power Devices Verification
21st Austrian Workshop on Microelectronics (Austrochip), Linz; in: Austrochip 2013. Tagungsband, 2013, p. 17 - 21
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O. Melnychenko, H.-P. Kreuter: A Metric Driven Verification and Validation Approach for Smart Power Devices
9th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), Villach; in: Conference Proceedings. 9th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), 2013, ISBN: 978-1-4673-4580-4, p. 289 - 292
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P. Puschner, D. Prokesch, B. Huber, J. Knoop, S Hepp, G. Gebhard (invited): The T-CREST Approach of Compiler and WCET-Analysis Integration
9th Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS 2013), Paderborn, Deutschland; in: Proceedings of the 9th Workshop on Software Technologies for Future Embedded and Ubiquitous Systems, 2013
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C. Geyer, B. Huber, D. Prokesch, P. Puschner: Time-Predictable Code Execution - Instruction-Set Support for the Single-Path Approach
16th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC 2013), Paderborn, Deutschland; in: Proc. 16th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC 2013), 2013
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M. Hofbauer, K. Schweiger, W. Gaberl, H. Zimmermann, U. Giesen, F. Langner, U. Schmid, A. Steininger: Single Event Transient Pulse Shape Measurements by On-chip Sense Amplifiers in a Single Inverter for Intermediate Input States under Alpha Particle Irradiation
IEEE Nuclear and Space Radiation Effects Conference (NSREC), San Francisco, California (USA)
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K. Chatterjee, A. Kößler, U. Schmid: Automated Analysis of Real-Time Scheduling using Graph Games
ACM International Conference on Hybrid Systems: Computation and Control, Philadelphia, USA; in: Proceedings 16th ACM International Conference on Hybrid Systems: Computation and Control (HSCC'13), ACM, 2013, p. 163 - 172
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T. Polzer, A. Steininger: Digital Late-Transition Metastability Simulation Model
16th Euromicro Conference on Digital System Design (DSD 2013), Santander; in: Proceedings of the 16th Euromicro Conference on Digital System Design, 2013; 8 pages
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T. Polzer, A. Steininger: SET Propagation in Micropipelines
23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS2013), Karlsruhe; in: 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS2013), 2013; 8 pages
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T. Polzer, A. Steininger: Metastability Characterization for Muller C-Elements
23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS2013), Karlsruhe; in: 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS2013), 2013; 8 pages
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T. Polzer, A. Steininger: An Approach for Efficient Metastability Characterization of FPGAs through the Designer
19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2013), Santa Monica, CA; in: 19th IEEE International Symposium on Asynchronous Circuits and Systems, 2013, ISSN: 1522-8681; 9 pages
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S. Naqvi, R. Najvirt, A. Steininger: A Multi-Credit Flow Control Scheme for Asynchronous NoCs
16th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, Karoly Vary, Czech Republic; in: Proc. 16th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2013; 6 pages
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R. Najvirt, S. Naqvi, A. Steininger: Classifying Virtual Channel Access Control Schemes for Asynchronous NoCs
19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2013), Santa Monica, CA; in: Asynchronous Circuits and Systems (ASYNC), 2013 IEEE 19th International Symposium on, 2013, ISSN: 1522-8681; 9 pages
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S. Varadan, A. Steininger: Performance of Radiation Hardening Techniques under Voltage and Temperature Variations
2013 IEEE Aerospace Conference, Big Sky, Montana, USA; in: Proc. 2013 IEEE Aerospace Conference, 2013; 6 pages
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R. Najvirt, S. Varadan, A. Steininger: Particle Strikes in C-Gates: Relevance of SET Shapes
2nd Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale, Avignon; in: Proceedings of the MEDIAN Workshop 2013, 2013; 4 pages
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S. Resch, A. Steininger, C. Scherrer: Software Composability and Mixed Criticality for Triple Modular Redundant Architectures
SASSUR Workshop 2013, Toulouse; in: Proceedings of the 2013 SASSUR Workshop, 2013; 4 pages
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S. Naqvi, A. Steininger, J. Lechner: An SET Tolerant Tree Arbiter Cell
19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2013), Santa Monica, CA; in: Asynchronous Circuits and Systems (ASYNC), 2013 IEEE 19th International Symposium on, 2013, ISSN: 1522-8681; 9 pages
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M. Zeiner, M Függer, U. Schmid, A. Kößler, T. Nowak: The Effect of Forgetting on the Performance of a Synchronizer
18th ÖMG Congress and Annual DMV Meeting, Innsbruck
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D. Dolev, M Függer, M. Hofstätter, C. Lenzen, M. Perner, M. Posch, U. Schmid, M. Sigl, A. Steininger: FATAL+HEX: Fault-Tolerant Self-Stabilizing Clock Generation+Distribution
Poster Session at the CSAIL Industry Affiliates Program (CSAIL-IAP) Annual Meeting, Cambridge, MA, USA
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M Függer, T. Nowak, U. Schmid: Unfaithful Glitch Propagation in existing Binary Circuit Models
19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2013), Santa Monica, CA; in: Asynchronous Circuits and Systems (ASYNC), 2013 IEEE 19th International Symposium on, 2013, ISSN: 1522-8681, p. 191 - 199
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B. Charron-Bost, M Függer, T. Nowak: Transience Bounds for Distributed Algorithms
11th International Conference on Formal Modeling and Analysis of Timed Systems (FORMATS 2013), Buenos Aires, Argentina; in: Formal Modeling and Analysis of Timed Systems, Lecture Notes in Computer Science, 8053 (2013), ISBN: 978-3-642-40228-9, p. 77 - 90
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C. Lenzen, M Függer, M. Hofstätter, U. Schmid: Efficient Construction of Global Time in SoCs despite Arbitrary Faults
16th Euromicro Conference on Digital System Design (DSD 2013), Santander, Spain; in: Dependable, Digital System Design (DSD), 2013 Euromicro Conference on, 2013, p. 142 - 151
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M. Perner, U. Schmid, C. Lenzen, M. Sigl: Byzantine Self-Stabilizing Clock Distribution with HEX: Implementation, Simulation, Clock Multiplication
DEPEND 2013, The Sixth International Conference on Dependability, Barcelona, Spain; in: Proceedings of the 6th IARA International Conference on Dependability (DEPEND'13), IARA, 2013, ISBN: 978-1-61208-301-8, p. 6 - 15
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M Függer, A. Kößler, T. Nowak, U. Schmid, M. Zeiner: The Effect of Forgetting on the Performance of a Synchronizer
ALGOSENSORS 2013 (9th International Symposium on Algorithms and Experiments for Sensor Systems, Wireless Networks and Distributed Robotics), Sophia Antipolis, France; in: Algorithms for Sensor Systems, 2013, p. 185 - 200
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D. Dolev, C. Lenzen, M Függer, U. Schmid, M. Perner: HEX: Scaling Honeycombs is Easier than Scaling Clock Trees
SPAA '13, Montreal, Canada; in: Proceedings of the 25th ACM symposium on Parallelism in Algorithms and Architectures, ACM, 2013, ISBN: 978-1-4503-1572-2, p. 164 - 175
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A. John, I. Konnov, U. Schmid, V. Veith, J. Widder: Brief announcement: parameterized model checking of fault-tolerant distributed algorithms by abstraction
ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing (PODC), Montreal, Kanada; in: PODC, ACM, 2013, ISBN: 978-1-4503-2065-8, p. 119 - 121
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A. John, I. Konnov, U. Schmid, V. Veith, J. Widder: Parameterized model checking of fault-tolerant distributed algorithms by abstraction
International Conference on Formal Methods in Computer-Aided Design (FMCAD), Portland, OR, USA; in: FMCAD, 2013, ISBN: 978-0-9835678-3-7, p. 201 - 209
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B. Cilku, R. Kammerer, P. Puschner: Aligning Single Path Loops to Reduce the Number of Capacity Cache Misses
6th International Workshop on Compositional Theory and Technology for Real-Time Embedded Systems, Vancouver, Canada; in: Proceedings of the 34th IEEE Real-Time Systems Symposium, 6th International Workshop on Compositional Theory and Technology for Real-Time Embedded Systems, 2013
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B. Cilku, P. Puschner: Towards Temporal and Spatial Isolation in Memory Hierarchies for Mixed-Criticality Systems with Hypervisors
1st Workshop on Real-Time Mixed Criticality Systems, Taipei, Taiwan; in: Proceedings of the 19th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 1st workshop on Real-Time Mixed Criticality Systems, 2013
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R. Kammerer, B. Frömel, R. Obermaisser, P. Milbredt: Composability and Compositionality in CAN-Based Automotive Systems based on Bus and Star Topologies
IEEE 11th International Conference on Industrial Informatics INDIN´2013, Bochum, Germany; in: Proceedings of the 11th International Conference on Industrial Informatics INDIN2013, 2013, p. 116 - 122
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E. Bartocci, R. Grosu (invited): Monitoring with uncertainty
HAS 2013, Rome, Italy; in: Proc. of HAS 2013: the Third International Workshop on Hybrid Autonomous Systems, Electronic Proceedings in Theoretical Computer Science, vol. 124 (2013), ISSN: 2075-2180; 4 pages
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E. Bartocci: Sampling-based Decentralized Monitoring for Networked Embedded Systems
HAS 2013, Rome, Italy; in: Proc. of HAS 2013: the Third International Workshop on Hybrid Autonomous Systems, Electronic Proceedings in Theoretical Computer Science, vol. 124 (2013), ISSN: 2075-2180, p. 85 - 99
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S. Bogomolov, D. Donze, G. Frehse, R. Grosu, T. Johnson, H. Ladan, A. Podelski, M. Wehrle: Abstraction-Based Guided Search for Hybrid Systems
International SPIN Symposium on Model Checking of Software (SPIN), Stony Brook, NY, USA; in: SPIN, LNCS, Springer, 7976 (2013), p. 117 - 134
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H. Isakovic, A. Wasicek: Secure Channels in an Integrated MPSoC Architecture
39th Annual Conference of the IEEE Industrial Electronics Society, Wien; in: Industrial Electronics Society, IECON 2013 - 39th Annual Conference of the IEEE, 2013, ISSN: 1553-572x, p. 4488 - 4493
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E. Bartocci, L. Bortolussi, L. Nenzi, G. Sanguinetti: On the Robustness of Temporal Properties for Stochastic Models
HSB 2013: the 2nd International Workshop on Hybrid Systems and Biology, Taormina, Italy; in: Proceedings of the Second International Workshop on Hybrid Systems and Biology, Electronic Proceedings on Theoretical Computer Science, vol. 125 (2013), ISSN: 2075-2180, p. 3 - 19
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S. Kandl, S. Chandrashekar: Reasonability of MC/DC for Safety-Relevant Software Implemented in Programming Languages with Short-Circuit Evaluation
9th Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS 2013), Paderborn, Deutschland; in: Proceedings of the 9th Workshop on Software Technologies for Future Embedded and Ubiquitous Systems, IEEE Proceedings, 2013
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E. Bartocci, L. Bortolussi, L. Nenzi: A temporal logic approach to modular design of synthetic biological circuits
CMSB 2013: the 11th International Conference on Computational Methods in Systems Biology, Klosterneuburg, Austria; in: Proc. of CMSB 2013: the 11th International Conference on Computational Methods in Systems Biology, LNCS/Springer, vol. 8130 (2013), ISBN: 978-3-642-40707-9, p. 164 - 178
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K. Kalajdzic, E. Bartocci, S. Stoller, S. Smolka, R. Grosu: Runtime Verification with Particle Filtering
RV 2013, the Fourth International Conference on Runtime Verification, RENNES, France; in: Proc. of RV 2013, the Fourth International Conference on Runtime Verification, LNCS/Springer, 8174 (2013), ISBN: 978-3-642-40786-4, p. 149 - 166
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O. Höftberger, R. Obermaisser: Ontology-based Runtime Reconfiguration of Distributed Embedded Real-Time Systems
16th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC 2013), Paderborn, Deutschland; in: Proc. 16th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC 2013), 2013
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P. Puschner, D. Prokesch, B. Huber, J. Knoop, S Hepp, G. Gebhard (invited): The platin Toolkit: A Core Component of the T-CREST Approach for Compiler and WCET-Analysis Integration
July'13 Meeting of the EU FP7 Cost Action no. IC1202 Timing Analysis on Code-Level (TACLe)", Paris
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M. Elshuber, S. Kandl, P. Puschner: Improving System-Level Verification of SystemC Models with SPIN
1st French Singaporean Workshop on Formal Methods and Applications, Singapore; in: 1st French Singaporean Workshop on Formal Methods and Applications, 2013, ISBN: 978-3-939897-56-9; 6 pages
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B. Huber, D. Prokesch, P. Puschner: Combined WCET analysis of bitcode and machine code using control-flow relation graphs
Conference on Languages, Compilers and Tools for Embedded Systems (LCTES 2013), Seattle, WA, USA; in: Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems, The Association for Computing Machinery, 2013, ISBN: 978-1-4503-2085-6, p. 163 - 172
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A. John, I. Konnov, U. Schmid, V. Veith, J. Widder: Towards Modeling and Model Checking Fault-Tolerant Distributed Algorithms
International SPIN Symposium on Model Checking of Software (SPIN), Stony Brook, NY, USA; in: SPIN, LNCS, Springer, 7976 (2013), ISBN: 978-3-642-39175-0, p. 209 - 226
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P. Milbredt, M. Glass, M. Lukasiewycz, A. Steininger, J. Teich: Designing FlexRay-based Automotive Architectures: A Holistic OEM Approach
Design, Automation & Test in Europe Conference & Exhibition (DATE 2012), Dresden, Germany; in: Design, Automation & Test in Europe Conference & Exhibition (DATE 2012) Proceedings, EDAA, 2012, ISBN: 978-3-9810801-8-6, p. 276 - 279
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S. Varadan, A. Steininger: Efficient Radiation-Hardening of a Muller C-Element
2012 Single Event Effects Symposium (SEE 2012), San Diego, USA; in: 2012 Single Event Effects Symposium, 2012
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S. Varadan, A. Steininger: LFSR Implementation Using C-Elements
MEMICS 2012, Znjomo, Czechia; in: MEMICS 2012, 2012, p. 73 - 83
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B. Fritz, S. Varadan, A. Steininger: Reliable Gateway for Radiation Experiments on a VLSI Chip
Austrochip 2012, Graz, Austria; in: Austrochip 2012, 2012, p. 65 - 70
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S. Varadan, A. Steininger: Radiation-Tolerant Combinational Gates - An Implementation Based Comparison
15th IEEE International Conference on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2012), Tallinn, Estonia; in: Design and Diagnostics of Electronic Circuits Systems (DDECS), 2012 IEEE 15th International Symposium on, 2012, p. 115 - 120
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S. Varadan, A. Steininger: Monitoring Single Event Transient Effects in Dynamic Mode
1st Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN 2012), Annecy, France; in: 1st Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN 2012), 2012, p. 51 - 54
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T. Reinbacher, J. Geist, P. Moosbrugger, M. Horauer, A. Steininger: Parallel Runtime Verification of Temporal Properties for Embedded Software
Mechatronics and Embedded Systems and Applications (MESA), 2012 IEEE/ASME International Conference on, Suzhou, China; in: Mechatronics and Embedded Systems and Applications (MESA), 2012 IEEE/ASME International Conference on, 2012, ISBN: 978-1-4673-2347-5, p. 224 - 231
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T. Reinbacher, M. Horauer, A. Steininger: A Runtime Verification Unit for Microcontrollers
System, Software, SoC and Silicon Debug Conference (S4D), 2012, Vienna, Austria; in: System, Software, SoC and Silicon Debug Conference (S4D), 2012, 2012, ISSN: 2114-3684, p. 1 - 6
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M. Hofbauer, K. Schweiger, H. Zimmermann, U. Giesen, F. Langner, U. Schmid, A. Steininger: Supply Voltage Dependent On-chip Single Event Transient Pulse Shape Measurements in 90 nm Bulk CMOS under Alpha Irradiation
21st European Conference on Radiation and its Effects on Components and Systems (RADECS'12), Biarritz, FRANCE; in: Proceedings 21st European Conference on Radiation and its Effects on Components and Systems (RADECS'12), 2012
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S. Varadan, A. Steininger, U. Schmid, T. Polzer: Architecture and Design Analysis of a Digital Single-Event Transient/Upset Measurement Chip
15th Euromicro Symposium on Digital System Design: Architectures, Methods and Tools (DSD 2012), Izmir, Turkey; in: Proceedings 15th Euromicro Symposium on Digital System Design: Architectures, Methods and Tools (DSD'12), 2012, p. 8 - 17
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D. Dolev, M Függer, C. Lenzen, U. Schmid (invited): Towards Self-stabilizing Byzantine Fault-Tolerant Clock Generation in Systems-on-Chip
NITRD Workshop, Baltimore, USA
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M. Biely, P. Robinson, U. Schmid: Agreement in Directed Dynamic Networks
19th International Colloquium on Structural Information and Communication Complexity (SIROCCO'12), Reykjavik, Iceland; in: Proceedings 19th International Colloquium on Structural Information and Communication Complexity (SIROCCO'12), 2012, p. 73 - 84
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J. Lechner, M. Lampacher: Protecting Pipelined Asynchronous Communication Channels Against Single Event Upsets
IEEE 30th International Conference on Computer Design (ICCD 2012), Montreal, Canada; in: Computer Design (ICCD), 2012 IEEE 30th International Conference on, 2012, ISSN: 1063-6404, p. 480 - 481
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J. Lechner, M. Lampacher, T. Polzer: A Robust Asynchronous Interfacing Scheme with Four-Phase Dual-Rail Coding
2012 International Conference on Application of Concurrency to System Design (ACSD 2012), Hamburg, Germany; in: Application of Concurrency to System Design (ACSD), 2012 12th International Conference on, 2012, ISSN: 1550-4808, p. 122 - 131
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J. Lechner: Designing Robust GALS Circuits with Triple Modular Redundancy
2012 European Dependable Computing Conference (EDCC 2012), Sibiu, Romania; in: Dependable Computing Conference (EDCC), 2012 Ninth European, 2012, p. 227 - 236
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T. Polzer, A. Steininger, J. Lechner: Muller C-Element Metastability Containment
International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2012, Newcastle upon Tyne; in: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, Lecture Notes in Computer Science, 7606 (2013), ISBN: 978-3-642-36156-2, p. 103 - 112
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S. Naqvi, S. Varadan, A. Steininger: Protecting an Asynchronous NoC against Transient Channel Faults
DSD 2012 (Euromicro Conference on Digital System Design), Cesme, Izmir, Turkey; in: Proc. of 15th Euromicro Conference on Digital System Design, 2012; 8 pages
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S. Naqvi: An Asynchronous Router Architecture using Four-Phase Bundled Handshake Protocol
ICCGI 2012 : The Seventh International Multi-Conference on Computing in the Global Information Technology, Venice, Italy; in: Proc. of The Seventh International Multi-Conference on Computing in the Global Information Technology, 2012, ISBN: 978-1-61208-202-8; 6 pages
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J. Lechner, R. Najvirt: A Generic Architecture for Robust Asynchronous Communication Links
International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2012, Newcastle upon Tyne; in: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, Lecture Notes in Computer Science, 7606 (2013), ISBN: 978-3-642-36156-2, p. 121 - 130
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T. Reinbacher, M Függer, J. Brauer: Real-Time Runtime Verification on Chip
RV 2012: the 3rd International Conference on Runtime Verification, Istanbul; in: Proc. of RV 2012: the 3rd International Conference on Runtime Verification, LNCS / Springer, 7687 (2012)
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M Függer, A. Kößler, T. Nowak, M. Zeiner: Brief Announcement: The Degrading Effect of Forgetting on a Synchronizer
14th International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2012), Toronto, Canada; in: Stabilization, Safety, and Security of Distributed Systems, Lecture Notes in Computer Science, 7596 (2012), ISBN: 978-3-642-33535-8, p. 90 - 91
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S. Bogomolov, G. Frehse, R. Grosu, H. Ladan, A. Podelski: A Box-Based Distance between Regions for Guiding the Reachability Analysis of SpaceEx
CAV'12, the 24th International Conference on Computer Aided Verification, Berkeley, California, USA; in: Proceedings of CAV'12, the 24th International Conference on Computer Aided Verification, LNCS / Springer, 7358 (2012), ISBN: 978-3-642-31423-0, p. 479 - 494
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D. Donze, O. Maler, E. Bartocci, D. Nickovic, R. Grosu, S. Smolka: On Temporal Logic and Signal Processing
Automated Technology for Verification and Analysis (ATVA), Thiruvananthapuram, India; in: Proceedings of ATVA 2012, the 10th International Symposium on Automated Technology for Verification and Analysis, LNCS/Springer, vol. 7561 (2012), ISBN: 978-3-642-33385-9, p. 92 - 106
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A. Murthy, I. Ariful, E. Bartocci, E. Cherry, F. Fenton, J. Glimm, S. Smolka, R. Grosu: Approximate Bisimulations for Sodium Channel Dynamics
The 10th ACM International Conference on Computational Methods in Systems Biology (CMSB 2012), London, UK; in: Proc. of CMSB 2012: the 10th ACM International Conference on Computational Methods in Systems Biology, LNCS / Springer, vol. 7605 (2012), ISBN: 978-3-642-33635-5, p. 267 - 287
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E. Bartocci, R. Grosu, A. Karmarkar, S. Smolka, S. Stoller, J. Seyster: Adaptive Runtime Verification
RV 2012: the 3rd International Conference on Runtime Verification, Istanbul; in: Proc. of RV 2012: the 3rd International Conference on Runtime Verification, LNCS / Springer, vol. 7687 (2012), ISSN: 0302-9743, p. 168 - 182
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R. Kammerer, R. Obermaisser, B. Frömel: Dynamic Configuration of a Time-Triggered Router for Controller Area Network
17th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA), Krakow, Poland; in: 17th IEEE International Conference on Emerging Technologies and Factory Automation, 2012
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P. Puschner, R. Kirner, D. Prokesch, B. Huber: Compiling for Time Predictability
ERCIM/EWICS/Cyberphysical Systems Workshop, Magdeburg, Germany; in: Computer Safety, Reliability, and Security - SAFECOMP 2012 Workshops, Lecture Notes in Computer Science / Springer, 7613 (2012), ISBN: 978-3-642-33674-4, p. 382 - 391
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B. Huber, D. Prokesch, P. Puschner: A Formal Framework for Precise Parametric WCET Formulas
12th International Workshop on Worst-Case Execution Time Analysis (WCET 2012), Pisa; in: 12th International Workshop on Worst-Case Execution Time Analysis, WCET 2012, Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, Oasics / 23 (2012), ISBN: 978-3-939897-41-5, p. 91 - 102
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A. John, I. Konnov, U. Schmid, V. Veith, J. Widder: Who is afraid of Model Checking Distributed Algorithms?
PUMA/RISE Seminar, Goldegg
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A. John, I. Konnov, U. Schmid, V. Veith, J. Widder (invited): Parameterized Model Checking of Fault-tolerant Distributed Algorithms
Dagstuhl Seminar 12461: Games and Decisions for Rigorous Systems Engineering, Dagstuhl, Deutschland
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M Függer, J. Widder: Efficient Checking of Link-Reversal-Based Concurrent Systems
International Conference on Concurrency Theory (CONCUR), Newcaslte upon Tyne, UK; in: CONCUR 2012 - Concurrency Theory, Lecture Notes in Computer Science. Springer Verlag., 7454 (2012), ISBN: 978-3-642-32939-5, p. 486 - 499
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M. Hofbauer, K. Schweiger, H. Dietrich, H. Zimmermann, K.O. Voss, B Merk, U. Schmid, A. Steininger: Pulse Shape Measurements by On-chip Sense Amplifiers of Single Event Transients Propagating through a 90 nm Bulk CMOS Inverter Chain
Nuclear and Space Radiation Effects Conference (NSREC), Miami, FL, USA
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R. Kammerer, B. Frömel, A. Wasicek: Enhancing Security in CAN Systems using a Star Coupling Router
7th IEEE International Symposium on Industrial Embedded Systems (SIES'12), Karlsruhe; in: Proceedings of the 7th IEEE International Symposium on Industrial Embedded Systems (SIES'12), IEEE, 2012, ISBN: 978-1-4673-2685-8, p. 237 - 246
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C. El Salloum, M. Elshuber, O. Höftberger, H. Isakovic, A. Wasicek (invited): The ACROSS MPSoC - A New Generation of Multi-Core Processors designed for Safety-Critical Embedded Systems
DSD 2012 (Euromicro Conference on Digital System Design), Cesme, Izmir, Turkey; in: 2012 15th Euromicro Conference on Digital System Design (DSD 2012), Proceedings, IEEE Computer Society, 2012, ISBN: 978-1-4673-2498-4, p. 105 - 113
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A. John, I. Konnov, U. Schmid, V. Veith, J. Widder: Counter Attack against Byzantine Generals
Alpine Verification Meeting, Passau, Bayern, Deutschland
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M Függer, J. Widder: On Efficient Checking of Link-reversal-based Concurrent Systems
PUMA/RISE Seminar, Traunkirchen
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M. Biely, P. Robinson, U. Schmid: Brief Announcement: Easy Impossibility Proofs for k-Set Agreement in Message Passing Systems
Proceedings of the 30th Annual ACM Symposium on Principles of Distributed Computing (PODC'11), San Jose; in: PODC'11, ACM, 2011, p. 227 - 228
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H. Moser, U. Schmid: Reconciling Fault-Tolerant Distributed Algorithms and Real-Time Computing
Structural Information and Communication Complexity, Gdansk; in: Proceedings 18th International Colloquium on Structural Information and Communication Complexity (SIROCCO'11), Springer Berlin / Heidelberg, 2011, ISBN: 978-3-642-22211-5, p. 42 - 53
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M. Biely, P. Robinson, U. Schmid: Solving k-Set Agreement with Stable Skeleton Graphs
International Parallel and Distributed Processing Symposium (IPDPS), Anachorage, Alaska; in: IPDPS Workshops, 2011, ISBN: 978-1-61284-425-1, p. 1488 - 1495
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M. Biely, P. Robinson, U. Schmid: Easy Impossibility Proofs for k-Set Agreement in Message Passing Systems
International Conference On Principles Of Distributed Systems (OPODIS), Toulouse; in: OPODIS'11, Springer Berlin / Heidelberg, 2011, p. 299 - 312
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T. Reinbacher, D. Gückel, M. Horauer: Testing microcontroller software simulators
WS4C 2011, Berlin; in: Workshop on Software Language Engineering for Cyber-physical Systems, 2011
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T. Reinbacher, A. Steininger, T. Müller, M. Horauer, J. Brauer, S. Kowalewski: Hardware support for efficient testing of embedded software
The 7th ASME/IEEE International Conference on Mechatronic and Embedded Systems and Applications, Washington; in: International Conference on Mechatronic and Embedded Systems and Applications, ASME, 2011
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T. Reinbacher, J. Brauer, M. Horauer, A. Steininger, S. Kowalewski: Past time LTL runtime verification for microcontroller binary code
FMICS 2011, Trento; in: Formal Methods for Industrial Critical Systems, Springer Berlin / Heidelberg, 2011, ISBN: 978-3-642-24430-8, p. 37 - 51
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T. Reinbacher, J. Brauer: Precise control flow reconstruction using boolean logic
EMSOFT2011, ACM international conference on Embedded software, Taipei; in: EMSOFT '11 Proceedings of the ninth ACM international conference on Embedded software, ACM New York, 2011, ISBN: 978-1-4503-0714-7, p. 117 - 126
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T. Reinbacher, J. Brauer, D. Schachinger, A. Steininger, S. Kowalewski: Automated test-trace inspection for microcontroller binary code
2nd International Conference on Runtime Verification (RV 2011), San Francisco; in: Runtime Verification, 2011, p. 239 - 244
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D. Dolev, M Függer, C. Lenzen, U. Schmid: Fault-Tolerant Algorithms for Tick-Generation in Asynchronous Logic: Robust Pulse Generation [Extended Abstract]
Stabilization, Safety, and Security of Distributed Systems, Grenoble, France; in: Stabilization, Safety, and Security of Distributed Systems, Springer Berlin / Heidelberg, 2011, ISBN: 978-3642051173, p. 163 - 177
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B. Charron-Bost, M Függer, L. Welch, J. Widder: Partial is Full
Structural Information and Communication Complexity, Gdansk; in: Structural Information and Communication Complexity, Springer Berlin / Heidelberg, 2011, ISBN: 978-3-642-22211-5, p. 113 - 124
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B. Charron-Bost, M Függer, L. Welch, J. Widder: Full Reversal Routing as a Linear Dynamical System
Structural Information and Communication Complexity, Gdansk; in: Structural Information and Communication Complexity, Springer Berlin / Heidelberg, 2011, ISBN: 978-3-642-22211-5, p. 101 - 112
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T. Nowak, M Függer, A. Kößler: On the Performance of a Retransmission-Based Synchronizer
Structural Information and Communication Complexity, Gdansk; in: Structural Information and Communication Complexity, Springer Berlin / Heidelberg, 2011, ISBN: 978-3-642-22211-5, p. 234 - 245
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B. Charron-Bost, M Függer, L. Welch, J. Widder: Brief announcement: full reversal routing as a linear dynamical system
SPAA '11, San Jose, California, USA; in: Proceedings of the 23rd ACM symposium on Parallelism in algorithms and architectures, ACM, 2011, ISBN: 978-1-4503-0743-7, p. 129 - 130
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M. Ferringer: Investigating the Impact of Process Variations on an Asynchronous Time-Triggered-Protocol Controller
Dependable Systems and Networks Workshops (DSN-W), 2011 IEEE/IFIP 41st International Conference on, Hong-Kong; in: Dependable Systems and Networks Workshops, 2011, ISBN: 978-1-4577-0374-4, p. 47 - 52
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M. Ferringer: Conversion and Interfacing Techniques for Asynchronous Circuits
14th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2011), Cottbus, Germany; in: Design and Diagnostics of Electronic Circuits & Systems, 2011, ISBN: 978-1-4244-9755-3, p. 11 - 16
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M. Ferringer: Conversion of Two- to Four-Phase Delay-Insensitive Asynchronous Circuits
EUROCON 2011, Lisbon; in: EUROCON - International Conference on Computer as a Tool (EUROCON), 2011 IEEE, 2011, ISBN: 978-1-4244-7486-8, p. 1 - 4
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R. Obermaisser, O. Höftberger: Fault Containment in a Reconfigurable Multi‐Processor System‐on‐a‐Chip
21st IEEE International Symposium on Industrial Electronics (ISIE 2011), Gdansk, Poland; in: 21st IEEE International Symposium on Industrial Electronics (ISIE 2011, IEEE, 2011, ISBN: 978-1-4244-9312-8, p. 1561 - 1568
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B. Cilku, P. Puschner: Using a Local Prefetch Strategy to Obtain Temporal Time Predictability
14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops (ISORCW), Newport Beach, California, USA; in: Proc. 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops (ISORCW), IEEE, 2011, ISBN: 978-1-4577-0303-4, p. 227 - 234
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S. Hanke, C. Mayer, O. Höftberger, H. Boos, R. Wichert, P. Wolf et al.: universAAL - an open and consolidated AAL platform
4. Deutsche AAL-Kongress, Berlin, Deutschland; in: Demographischer Wandel - Assistenzsysteme aus der Forschung in den Markt (AAL 2011), 2011, ISBN: 978-3-8007-3323-1
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R. Obermaisser, R. Kammerer, A. Kasper (invited): Sternkoppler für Controller Area Network (CAN) auf Basis eines Multi-Processor System-on-a-Chip (MPSoC)
AmE 2011 - Automotive meets Electronics, Dortmund, Deutschland; in: Proc. of AmE 2011 - Automotive meets Electronics, 2011
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W. Puffitsch: Hard Real-Time Garbage Collection for a Java Chip Multi-Processor
9th International Workshop on Java Technologies for Real-Time and Embedded Systems (JTRES 2011), York, United Kingdom; in: Proceedings of the 9th International Workshop on Java Technologies for Real-Time and Embedded Systems, ACM, 2011
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M. Schoeberl, P. Schleuniger, W. Puffitsch, F. Brandner et al.: Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach
First Workshop on Bringing Theory to Practice: Predictability and Performance in Embedded Systems (PPES 2011), Grenoble, France; in: First Workshop on Bringing Theory to Practice: Predictability and Performance in Embedded Systems (PPES 2011), 2011, ISBN: 978-3-939897-28-6, p. 11 - 21
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S. Kuster: Successful communication in European research projects - the GENESYS project as best practice
2. Projekt Management Symposium der Fachhochschule des bfi Wien, Wien; in: Wirtschaft und Management, Schriftenreihe zur Wissenschaftlichen Forschung und Praxis, Band 15, Wirtschaft und Management, Heft 15 (2011), p. 75 - 89
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M. Zolda, R. Kirner, S. Bünte: Context-Sensitive Measurement-Based Worst-Case Execution Time Estimation
17th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA'11), Toyama, Japan; in: Proc. 17th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA'11), 2011, ISBN: 978-1-4577-1118-3, p. 243 - 250
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S. Bünte, M. Zolda, R. Kirner: Let's Get Less Optimistic In Measurement-Based Timing Analysis
6th International Symposium on Industrial Embedded Systems (SIES'11), Västeras, Sweden; in: Proc. 6th International Symposium on Industrial Embedded Systems (SIES'11), 2011, ISBN: 978-1-61284-818-1, p. 204 - 212
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R. Kirner, M. Zolda (invited): Compiler Support for Measurement-based Timing Analysis
11th International Workshop on Worst-Case Execution-Time Analysis, Porto, Portugal; in: Proceedings of the 11th International Workshop on Worst-Case Execution Time (WCET) Analysis, 2011, p. 62 - 71
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B. Huber, W. Puffitsch, P. Puschner: Towards an open timing analysis platform
11th International Workshop on Worst-Case Execution Time Analysis, Porto; in: Proceedings of the 11th International Workshop on Worst-Case Execution Time (WCET) Analysis, 2011, p. 6 - 15
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V. Mikolasek, H. Kopetz: Roll-Forward Recovery with State Estimation
14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC 2011), Newport Beach, California, USA; in: 14th IEEE International Symposium on Object/Component/Service-oriented Real-time Distributed Computing (ISORC), IEEE, 2011, ISBN: 978-1-61284-433-6, p. 179 - 186
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A. Wasicek, C. El Salloum, H. Kopetz: Authentication in Time-Triggered Systems using Time-delayed Release of Keys
14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC 2011), Newport Beach, California, USA; in: 14th IEEE International Symposium on Object/Component/Service-oriented Real-time Distributed Computing (ISORC), IEEE, 2011, ISBN: 978-1-61284-433-6, p. 31 - 39
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S. Bünte, M. Zolda, M. Tautschnig, R. Kirner: Improving the Confidence in Measurement-Based Timing Analysis
14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC 2011), Newport Beach, California, USA; in: 2011 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC 2011), IEEE, 2011, ISBN: 978-1-61284-433-6, p. 144 - 151
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A. Kößler: Challenges in Fault-Tolerant Distribiuted Real-Time Systems
RiSE Workshop TU Graz, Szentendre, Hungary
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M Függer (invited): Fault-Tolerant Distribiuted on-chip Algorithms
PUMA 2010, Szentendre, Hungary
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M Függer (invited): Fault-Tolerant Distribiuted on-chip Algorithms
RiSE GUGGING (IST AUSTRIA), Gugging (IST Austria)
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M Függer (invited): Fault-Tolerant Distribiuted on-chip Algorithms
FK 2010 (Forschungskooperation TU Wien - UNI Brno), Brno, Czech Republic
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U. Schmid (invited): Synchrony and Time in Fault-Tolerant Distribiuted Algorithms
FORMATS 2010 (Formal Modeling and Analysis of Times Systems), Klosterneuburg, Austria; in: Formal Modeling and Analysis of Timed Systems, Springer, 6246 (2010), ISBN: 9783642152962
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T. Reinbacher, J. Brauer, M. Horauer, A. Steininger, S. Kowalewski: Test-Case Generation for Embedded Binary Code Using Abstract Interpretation
MEMICS 2010 (Mathematical and Engineering Methods in Computer Science), Mikulov, Czech Republic; in: MEMICS proceedings, 2010, p. 151 - 158
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W. Friesenbichler, T. Panhofer, A. Steininger: Reliability Estimation and Experimental Results of a Self-Healing Asynchronous Circuit: A Case Study
NASA/ESA 2010 (Conference on Adaptive Hardware and Systems), Anaheim, CA, USA; in: NASA/ESA 2010 Proceedings, IEEE Computer Society, 2010, ISBN: 9781424458882, p. 97 - 104
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W. Friesenbichler, T. Panhofer, A. Steininger: Implementation of Self-Healing Asynchronous Circuits at the Example of a Video-Processing Algorithm
WSDN 2010 (4th Workshop on Dependable and Secure Nanocomputing, Chicago, IL, USA; in: WSDN - Full Program, IEEE Computer Socitey, 2010, ISBN: 9781424477289, p. 129 - 134
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W. Friesenbichler, T. Panhofer, A. Steininger: A Deterministic Approach for Hardware Fault Injection in Asynchronous QDI Logic
DDECS 2010 (Design and Diagnostics of Electronic Circuits and Systems), Vienna, Austria; in: 13th IEEE International Symposium On Design And Diagnostics Of Electronic Cicruits And Systems, IEEE, 2010, ISBN: 9781424466108, p. 317 - 322
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H. Chung, P. Robinson, L. Welch: Regional Consecutive Leader Election in Mobile Ad-Hoc Networks
ACM SIGACT/SIGMOBILE (International Workshop on FOUNDATIONS OF MOBILE COUMPUTING), Cambridge, Massachusetts, USA; in: Proceedings of the 6th International Workshop on Foundations of Mobile Computing, ACM, 2010, ISBN: 9781450304139, p. 81 - 90
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H. Chung, P. Robinson, L. Welch: Brief Announcement: Regional Consecutive Leader Election in Mobile Ad-Hoc Networks
ALGOSENSORS 2010 (6th International Workshop on Algorithmic Aspects of Wireless Sensor Networks), Bordeaux, France; in: Algorithms for Sensor Systems - LNCS, Springer, 6451/2010 (2010), ISBN: 9783642169878, p. 90 - 91
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A. Kößler, H. Moser, U. Schmid: Real-Time Analysis of Round-based Distributed Algorithms
RTSOPS 2010 (1st International Real-Time Scheduling Open Problems Seminar), Brussels, Belgium; in: Proceedings of the 1st International Real-Time Scheduling Open Problems Seminar, 2010, p. 9 - 11
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M. Ferringer: Investigating Self-Timed Circuits for the Time-Triggered Protocol
5th International Workshop on Reconfigurable Communication Centric System-on-Chips, Workshop Proceedings (ReCoSoC), Karlsruhe, Germany; in: Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip 2010, KIT Scientific Publishing - DFG, 2010, ISBN: 9783866445154, p. 101 - 108
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M. Ferringer: Towards self-timed logic in the Time-Triggered Protocol
DSN 2010 (International Conference on Dependable Systems and Networks), Chicago, IL, USA; in: DSN 2010 - Full Program, IEEE Computer Society, 2010, ISBN: 9781424477289, p. 136 - 141
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M Függer, A. Dielacher, U. Schmid: How to Speed-Up Fault-Tolerant Clock Generation in VLSI Systems-on-Chip via Pipelining
EDCC - 8 (European Dependable Computing Conference), Valencia, Spain; in: Proceedings of the Eight European Dependable Computing Conference, IEEE Computer Society, 2010, ISBN: 9780769540078, p. 230 - 239
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M. Jeitler, J. Lechner, A. Steininger: Enhancing Pipelined Processor Architectures with Fast Autonomous Recovery of Transient Faults
DDECS 2010 (Design and Diagnostics of Electronic Circuits and Systems), Vienna, Austria; in: 13th IEEE International Symposium On Design And Diagnostics Of Electronic Cicruits And Systems, IEEE Computer Society, 2010, ISBN: 9781424466108, p. 233 - 236
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M. Jeitler, J. Lechner: Low Latency Recovery from Transient Faults for Pipelined Processor Architectures
DSD 2010 (Euromicro Conference on Digital System Design), Lille, France; in: Proceedings DSD 2010 (Euromicro Conference on Digital System Design), IEEE Computer Society, 2010, ISBN: 9780769541716, p. 219 - 225
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R. Obermaisser, R. Kammerer: A Router for Improved Fault Isolation, Scalability and Diagnosis in CAN
IEEE International Conference on Industrial Informatics (INDIN 2010), Osaka, Japan; in: A Router for Improved Fault Isolation, Scalability and Diagnosis in CAN, 2010, p. 121 - 127
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W. Puffitsch, B. Huber, M. Schoeberl: Worst-Case Analysis of Heap Allocations
4th International Symposium On Leveraging Applications of Formal Methods, Verification and Validation (ISoLA 2010), Heraklion, Griechenland; in: Worst-Case Analysis of Heap Allocations, Lecture Notes in Computer Science, 6416 (2010), p. 464 - 478
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S. Kandl, R. Kirner: Error Detection Rate of MC/DC for a Case Study from the Automotive Domain
8th IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems, Waidhofen/Ybbs, Austria; in: Software Technologies for Embedded and Ubiquitous Systems, Lecture Notes in Computer Science, Volume 6399 (2010), p. 131 - 142
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R. Obermaisser, J. Perez, C. El Salloum, Carlos Nicolas: Modeling Time-Triggered Architecture Based Safety-Critical Embedded Systems Using SystemC
Forum on specification & Design Languages (FDL), Southampton, UK; in: Modeling Time-Triggered Architecture Based Safety-Critical Embedded Systems Using SystemC, 2010
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R. Kirner, P. Puschner: Time-Predictable Computing
8th IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems, Waidhofen/Ybbs, Austria; in: Time-Predictable Computing, 2010, p. 23 - 34
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A. Kadlec, R. Kirner, P. Puschner: Avoiding Timing Anomalies Using Code Transformations
Proceedings of 13th IEEE International Symposium on Object/component/service-oriented Real-time distributed computing (ISORC'10), Carmona, Seville, Spein; in: Avoiding Timing Anomalies Using Code Transformations, IEEE, 2010, ISBN: 978-1-4244-7083-9, p. 123 - 132
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B. Cilku, P. Puschner: Towards a Time-Predictable Hierarchical Memory Architecture - Prefetching Options to be Explored
Proc. 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops (ISORCW 2010), Carmona, Sevilla, Spain; in: Towards a Time-Predictable Hierarchical Memory Architecture - Prefetching Options to be Explored, 2010, p. 219 - 225
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M. Zolda, S. Bünte, R. Kirner: Context-Sensitivity in IPET for Measurement-Based Timing Analysis
4th International Symposium On Leveraging Applications of Formal Methods, Verification and Validation (ISoLA 2010), Heraklion, Griechenland; in: Context-Sensitivity in IPET for Measurement-Based Timing Analysis, Lecture Notes in Computer Science, 6416 (2010), p. 487 - 490
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B. Huber, P. Puschner: A Code Policy Guaranteeing Fully Automated Path Analysis
10th International Workshop on Worst-Case Execution-Time Analysis, Brussels, Belgium; in: A Code Policy Guaranteeing Fully Automated Path Analysis, Austrian Computer Society, 2010, ISBN: 978-3-85403-268-7, p. 80 - 90
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B. Huber, W. Puffitsch, M. Schoeberl: WCET driven design space exploration of an object cache
Workshop on Java Technologies for Real-time and Embedded Systems (JTRES), Prague, Czech Republic; in: WCET driven design space exploration of an object cache, ACM, 2010, ISBN: 978-1-4503-0122-0, p. 26 - 35
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A. Wasicek, H. Kopetz, C. El Salloum: A System-on-a-Chip Platform for Mixed-Criticality Applications
Proceedings of 13th IEEE International Symposium on Object/component/service-oriented Real-time distributed computing (ISORC'10), Carmona, Seville, Spain; in: Proceedings of 13th IEEE International Symposium on Object/component/service-oriented Real-time distributed computing (ISORC'10), IEEE, 2010, ISBN: 978-1-4244-7083-9, p. 210 - 216
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M. Schoeberl, P. Puschner, R. Kirner: A Single-Path Chip-Multiprocessor System
Software Technologies for Embedded and Ubiquitous Systems 7th IFIP WG 10.2 International Workshop, SEUS 2009, Newport Beach, CA, USA; in: Software Technologies for Embedded and Ubiquitous Systems 7th IFIP WG 10.2 International Workshop, SEUS 2009, Lecture Notes in Computer Science / Springer Verlag, 5860 (2009), ISBN: 978-3-642-10264-6, p. 47 - 57
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M. Schoeberl, W. Puffitsch, B. Huber: Towards Time-predictable Data Caches for Chip-Multiprocessors
Software Technologies for Embedded and Ubiquitous Systems 7th IFIP WG 10.2 International Workshop, SEUS 2009, Newport Beach, CA, USA; in: Software Technologies for Embedded and Ubiquitous Systems 7th IFIP WG 10.2 International Workshop, SEUS 2009, Lecture Notes in Computer Science / Springer Verlag, 5860 (2009), ISBN: 978-3-642-10264-6, p. 180 - 191
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H. Paulitsch, C. Paukovits, C. El Salloum: Fault Isolation with Intermediate Checks of End-to-end Checksums in the Time-Triggered System-on-Chip Architecture
2009 IEEE International Symposium on Industrial Embedded Systems, SIES 2009 Proceedings, Lausanne, Switzerland; in: Industrial Embedded Systems, 2009. SIES '09. IEEE International Symposium on, IEEE, 2009, ISBN: 978-1-4244-4110-5, p. 90 - 99
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M. Biely, M. Hutle: Consensus When All Processes May Be Byzantine for Some Time
11th International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2009), Lyon; in: Stabilization, Safety, and Security of Distributed Systems, Lecture Notes in Conputer Science / Springer Verlag, 5873 (2009), ISBN: 978-3-642-05117-3, p. 120 - 132
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M. Zolda, S. Bünte, R. Kirner: Towards Adaptable Control Flow Segmentation for measurement-Based Execution Time Analysis
International Conference on Real-Time and Network Systems (RTNS), Paris, France; in: 17th International Conference on Real-Time and Network Systems, Proceedings, 2009; 10 pages
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R. Kirner: Towards Automatic Verification of Structural Code-Coverage Preservation
Timing Analysis and Symbolic Computation, TASCo 2009, Wien; in: Timing Analysis and Symbolic Computation, TASCo 2009, 2009; 1 pages
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R. Kirner, W. Zimmermann, D. Richter: On Undecidability Results of Real Programming Languages
15. Kolloquium Programmiersprachen und Grundlagen der Programmierung (KPS 2009), Maria Taferl; in: 15. Kolloquium Programmiersprachen und Grundlagen der Programmierung (KPS 2009), J. Knoop, A. Prantl (ed.); Schriftenreihe des Instituts für Computersprachen, TU Wien, Bericht 2009-X-1 (2009), p. 141 - 154
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R. Kirner, W. Haas: Automatic Calculation of Coverage Profiles for Coverage-based Testing
15. Kolloquium Programmiersprachen und Grundlagen der Programmierung (KPS 2009), Maria Taferl; in: 15. Kolloquium Programmiersprachen und Grundlagen der Programmierung (KPS 2009), J. Knoop, A. Prantl (ed.); Schriftenreihe des Instituts für Computersprachen, TU Wien, Bericht 2009-X-1 (2009), p. 126 - 140
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B. Huber, R. Obermaisser: A Comparison of NoTA and GENESYS
Embedded Computer Systems: Architectures, Modeling, and Simulation, 9th InternationalWorkshop, SAMOS 2009, Proceedings, Samos, Greece; in: Embedded Computer Systems: Architectures, Modeling, and Simulation, 9th InternationalWorkshop, SAMOS 2009, Proceedings, LNCS / Springer, 5657 (2009), ISBN: 3-642-03137-4, p. 181 - 192
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G. Fuchs: Implications of VLSI Fault Models and Distributed Systems Failure Models --- A Hardware Designer's View
Dagstuhl Seminar 08371 : Fault-Tolerant Distributed Algorithms on VLSI Chips, Dagstuhl, Germany; in: Fault-Tolerant Distributed Algorithms on VLSI Chips, Leibniz Zentrum Informatik, 8371 (2009), ISSN: 1862-4405, p. ?
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W. Puffitsch: Data Caching, Garbage Collection, and the Java Memory Model
Proceedings of the 7th International Workshop on Java Technologies for Real-Time and Embedded Systems (JTRES09), Madrid, Spain; in: Proceedings of the 7th International Workshop on Java Technologies for Real-Time and Embedded Systems, ACM Digital Library, 2009, ISBN: 978-1-60558-732-5, p. 130 - 139
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S. Edwards, S. Kim, E. Lee, I. Liu, H. Patel, M. Schoeberl: A Disruptive Computer Design Idea: Architectures with Repeatable Timing
2009 IEEE International Conference on Computer Design, Resort at Squaw Creek, Lake Tahoe, California; in: 2009 IEEE International Conference on Computer Design, IEEE, CFP09ICD (2009), ISBN: 978-1-4244-5028-2, p. 54 - 59
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J. Whitham, N. Audsley, M. Schoeberl: Using Hardware Methods to Improve Time-predictable Performance in Real-time Java Systems
Proceedings of the 7th International Workshop on Java Technologies for Real-Time and Embedded Systems (JTRES09), Madrid, Spain; in: Proceedings of the 7th International Workshop on Java Technologies for Real-Time and Embedded Systems, ACM Digital Library, 2009, ISBN: 978-1-60558-732-5, p. 130 - 139
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M. Jeitler, J. Lechner: Speeding up Fault Injection for Asynchronous Logic by FPGA-based Emulation
ReConFig 2009 (International Conference on ReConFigurable Computing and FPGAs), Cancun, Quintana Roo, Mexico; in: ReConFig'09, CPS, 2009, ISBN: 9780769539171, p. 65 - 70
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M. Jeitler, J. Lechner: Comparing the Robustness of Synchronous and Asynchronous Circuits by Fault Injection
MEMICS 2009 (Mathematical and Engineering Methods in Computer Science), Znojmo; in: MEMICS 2009 proceedings, Universität Brno, 2009, ISBN: 9788087342046, p. 110 - 117
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M. Jeitler, M. Delvai, S. Reichör: Fuse - A Hardware Accelerated Hdl Fault Injection Tool
SPL 2009 (Southern Conference on Programmable Logic), Sao Carlos, Brazil; in: 2009, IEEE, 2009, ISBN: 9781424438464, p. 89 - 94
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B. Charron-Bost, S. Dolev, J. Ebergen, U. Schmid (invited): Fault Tolerant Distribiuted Algorithms and VLSI - An Appetizer
Dagstuhl Seminar 08371 : Fault-Tolerant Distributed Algorithms on VLSI Chips, Dagstuhl, Germany; in: Fault-Tolerant Distributed Algorithms on VLSI Chips, Leibniz Zentrum Informatik, 8371 (2009), ISSN: 1862-4405, p. ?
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A. Steininger (invited): Error Containment in the Presence of Metastability
Dagstuhl Seminar 08371 : Fault-Tolerant Distributed Algorithms on VLSI Chips, Dagstuhl, Germany; in: Fault-Tolerant Distributed Algorithms on VLSI Chips, Leibniz Zentrum Informatik, 8371 (2009), ISSN: 1862-4405, p. ?
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E. Armengaud, A. Steininger: Remote Measurement of Local Oscillator Drifts in FlexRay Networks
DATE 2009 (Design, Automation and Test in Europe), Nice, France; in: DATE09, Springer, 2009, ISBN: 9783981080155, p. 1082 - 1087
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P Tummeltshammer, A. Steininger: On the Risk of Fault Coupling over the Chip Substrate
DSD 2009 (Euromicro Conference on Digital System Design), Patras, Greece; in: 12th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN - Architectures, Methods and Tools - DSD2009, IEEE Computer Society, 2009, ISBN: 9780769537825, p. 325 - 332
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W. Friesenbichler, A. Steininger: Soft Error Tolerant Asynchronous Circuits based on Dual Redundant Four State Logic
DSD 2009 (Euromicro Conference on Digital System Design), Patras, Greece; in: 12th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN - Architectures, Methods and Tools - DSD 2009, IEEE Computer Society, 2009, ISBN: 9780769537825, p. 100 - 107
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M Függer, G. Fuchs, A. Steininger: On the Stability and Robustness of Non-Synchronous Circuits with Timing Loops
WSDN 2009 (Workshop on Dependable and Secure Nanocomputing, Estoril, Lisbon, Portugal; in: WSDN 2009, Springer, 2009, ISBN: 9781424444212, p. 45 - 50
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A. Dielacher, M Függer (invited): How to Speed-up Fault-tolerant Clock Generation in VLSI Systems-on-Chip via Pipelining
PODC 2009 (Principles of Distribiuted Computing), Alberta, Canada; in: PODC'09, ACM, 2009, ISBN: 9781605583969, p. 276 - 277
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G. Fuchs, M Függer, A. Steininger: On the Threat of Metastability in an Asynchronous Fault-Tolerant Clock Generation Scheme
ASYNC 2009 (International Symposium on Asynchronous Circuits and Systems), Chapel Hill, North Carolina; in: ASYNC 2009, IEEE Computer Society, 2009, ISSN: 1522-8681, p. 127 - 136
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P Tummeltshammer, A. Steininger: Power Supply Induced Common Cause Faults - Experimental Assessment of Potential Countermeasures
DSN 2009 (International Conference on Dependable Systems and Networks), Estoril, Portugal; in: DSN 2009 - Full Program, Springer, 2009, ISBN: 9781424444212, p. 449 - 457
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P Tummeltshammer, A. Steininger: On the Role of the Power Supply as an Entry for Common Cause Faults - An Experimental Analysis
DDECS 2009 (Design and Diagnostics of Electronic Circuits and Systems), Liberec, Czech Republic; in: 2009 IEEE Design and Diagnostics of Electronic Circuits and Systems, IEEE, 2009, ISBN: 9781424433414, p. 152 - 157
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M. Schoeberl, W. Binder, P. Moret, A. Villazón: Design Space Exploration for Java Processors with Cross-Profiling
Sixth International Conference on the Quantitative Evaluation of Systems QEST 2009, Budapest, Hungary; in: Sixth International Conference on Quantitative Evaluation of Systems, IEEE computer society, CPS, 2009, 978-0-7695-33808-2, p. 109 - 118
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B. Huber, M. Schoeberl: Comparison of Implicit Path Enumeration and Model Checking based WCET Analysis
9th International Workshop on Worst-Case Execution Time (WECT) Analysis, Dublin, Ireland; in: Worst-Case Execution Time (WCET) Analsysis, Austrian Computer Society, 252 (2009), ISBN: 978-3-85403-252-6, p. 27 - 38
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M. Schoeberl, P. Puschner: Is Chip-Multiprocessing the End of Real-Time Scheduling?
9th International Workshop on Worst-Case Execution Time (WECT) Analysis, Dublin, Ireland; in: Worst-Case Execution Time (WCET) Analsysis, Austrian Computer Society, 252 (2009), ISBN: 978-3-85403-252-6, p. 96 - 106
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H. Paulitsch, C. Paukovits, C. El Salloum, H. Kopetz: Fault Isolation with Intermediate Checks of End-to-end Checksums in the Time-Triggered System-on-Chip Architecture
DSNOC'09 (DATE Friday Workshop), Nice, France
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R. Kirner, A. Kadlec, P. Puschner: Precise Worst-Case Execution Time Analysis for Processors with Timing Anomalies
Euromicro Conference on Real-Time Systems (ECRTS), Dublin, Ireland; in: Proceedings of The 21th Euromicro Conference on Real-Time Systems, IEEE computer society, CPS, 2009, ISBN: 978-0-7695-3724-5, p. 119 - 128
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M. Ferringer: Coupling Asynchronous Signals into Asynchronous Logic
Austrochip, Graz, Austria; in: Austrochip, Institut für Elektronik - TU Graz, 2009, ISBN: 978-3-9501635-1-3, p. 97 - 102
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P. Puschner, R. Kirner: Model-Driven Design and Organic Computing -- Combinable Strategies?
IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Tokyo, Japan; in: 12th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, IEEE, 2009, p. 101
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B. Charron-Bost, L. Welch, J. Widder: Link Reversal: How to Play Better to Work Less
ALGOSENSORS 2009 (5th International Workshop on Algorithmic Aspects of Wireless Sensor Networks), Rhodes, Greece; in: Algorithmic Aspects of Wireless Sensor Networks, Springer, 5304/2008 (2009), ISBN: 9783642054334, p. 88 - 110
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B. Charron-Bost, A. Gaillard, L. Welch, J. Widder: Routing without Ordering
SPAA 2009 (Parallelism in Algorithms and Architectures), Calgary, Alberta, Canada; in: Proceedings of the Twenty-First Annual Symposium on Parallelism in Algorithms and Architectures, ACM, 2009, ISBN: 978-1-60558-606-9, p. 145 - 153
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P. Puschner, R. Kirner, R. Pettit: Towards Composable Timing for Real-Time Software
First International Workshop on Software Technologies for Future Dependable Distributed Systems (STFSSD 2009), Tokyo, Japan; in: 2009 Software Technologies for Future Dependable Distributed Systems, IEEE, 2009, ISBN: 978-0-7695-3572-2, p. 1 - 5
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M. Schoeberl (invited): Time-predictable Cache Organization
First International Workshop on Software Technologies for Future Dependable Distributed Systems (STFSSD 2009), Tokyo, Japan; in: 2009 Software Technologies for Future Dependable Distributed Systems, IEEE, 2009, ISBN: 978-0-7695-3572-2, p. 11 - 16
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M. Biely, P. Robinson, U. Schmid: Weak Synchrony Models and Failure Detectors for Message Passing (k-)Set Agreement
OPODIS 2009 (International Conference On Principles Of Distributed Systems), Nimes, France; in: LNCS Proceedings, Springer, 5923/2009 (2009), ISBN: 9783642108761, p. 285 - 299
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V. Mikolasek: Dependability and Robustness: State of the Art and Challenges
First International Workshop on Software Technologies for Future Dependable Distributed Systems (STFSSD 2009), Tokyo, Japan; in: 2009 Software Technologies for Future Dependable Distributed Systems, IEEE, 2009, ISBN: 978-0-7695-3572-2, p. 25 - 31
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P. Robinson, M. Biely, U. Schmid: Brief Announcment: Weak Synchrony Models and Failure Detectors for Message Passing (k-)Set Agreement*
DISC 2009 (International Symposium on Distributed Computing), Elche, Spain; in: Distribiuted Computing, Springer, 5805/2009 (2009), ISBN: 978-3-642-04354-3, p. 360 - 361
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F. Brandner, T. Thorn, M. Schoeberl: Embedded JIT Compilation with CACAO on YARI
IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Tokyo, Japan; in: 12th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, IEEE, 2009, p. 63 - 70
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T. Polzer, T. Handl, A. Steininger: A Metastability-Free Multi-synchronous Communication Scheme for SoCs
SSS 2009 (Symposium on Stabilization, Safety, and Security of Distributed Systems), Lyon, France; in: Stabilization, Safety, and Security of Distribiuted Systems, Springer, 5873/2009 (2009), ISBN: 978-3642051173, p. 578 - 592
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A. Wellings, M. Schoeberl: Thread-Local Scope Caching for Real-time Java
IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Tokyo, Japan; in: 12th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, IEEE, 2009, p. 275 - 282
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R. Obermaisser, C. El Salloum, B. Huber, H. Kopetz: Fundamental Design Principles for Embedded Systems: The Architectural Style of the Cross-Domain Architecture GENESYS
IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Tokyo, Japan; in: 12th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, IEEE, 2009, p. 3 - 11
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M. Birner, T. Handl: ARROW - A Generic Hardware Fault Injection Tool for NoCs
DSD 2009 (Euromicro Conference on Digital System Design), Patras, Greece; in: 12th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN - Architectures, Methods and Tools - DSD 2009, IEEE Computer Society, 2009, ISBN: 978-0-7695-3782-5, p. 465 - 472
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A. Prantl, J. Knoop, R. Kirner, A. Kadlec, M Schordan: From Trusted Annotations to Verified Knowledge
15. Kolloquium Programmiersprachen und Grundlagen der Programmierung (KPS 2009), Maria Taferl; in: 15. Kolloquium Programmiersprachen und Grundlagen der Programmierung (KPS 2009), J. Knoop, A. Prantl (ed.); Schriftenreihe des Instituts für Computersprachen, TU Wien, Bericht 2009-X-1 (2009), p. 155 - 166
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A. Prantl, J. Knoop, R. Kirner, M Schordan, A. Kadlec: From Trusted Annotations to Verified Knowledge
9th International Workshop on Worst-Case Execution Time Analysis (WCET 2009), Dublin, Ireland; in: Preliminary Proceedings of the 9th International Workshop on Worst-Case Execution Time Analysis (WCET 2009), N. Holsti (ed.); 2009, p. 35 - 45
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S. Bünte, M. Tautschnig: A Benchmarking Suite for Measurement-Based WCET Analysis Tools
International Conference on Software Testing Verification and Validation Workshop, 2008. ICSTW '08. IEEE, Lillehammer, Norway; in: International Conference on Software Testing Verification and Validation Workshop, 2008. ICSTW '08. IEEE, IEEE Computer Society, 2008, ISBN: 978-0-7695-3388-9, p. 353 - 356
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H. Kopetz: Composability in the time-triggered system-on-chip architecture
Proceedings of the 21st Annual IEEE International SoC Conference, Vienna, Austria; in: Proceedings of the 21st Annual IEEE International SoC Conference, 2008, ISBN: 978-1-4244-2596-9, p. 87 - 90
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M. Zolda: INFER: Interactive Timing Profiles based on Bayesian Networks
WCET 2008, Prague, Czech Republic; in: Worst-Case Execution Time Analysis; Proceedings of the 8th International Workshop (WCET 2008), Österreichische Computer Gesellschaft, 2008, ISBN: 978-3-85403-237-3, p. 39 - 51
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B. Rieder, P. Puschner, I. Wenzel: Using Model Checking to Derive Loop Bounds of General Loops within ANSI-C Applications for Measurement Based WCET Analysis
Workshop on Intelligent Solutions in Embedded Systems (WISES'08), Regensburg, Germany; in: Proceedings of the Sixth Workshop on Intelligent Solutions in Embedded Systems, IEEE Computer Society, 2008, ISBN: 978-3-00-024989-1, p. 3 - 9
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B. Rieder, P. Puschner: Hybrid Timing Analysis for ANSI-C Applications with Loops and Function Calls
Junior Scientist Conference 2008, Wien; in: Proceedings of the Junior Scientist Conference 2008, 2008, ISBN: 978-3-200-01612-5, p. 101 - 102
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E. Suethanuwong, C. El Salloum: A Simulation Environment for Distributed Real-Time Systems in the Presence of Malicious Attacks
Junior Scientist Conference 2008, Wien; in: Proceedings of the Junior Scientist Conference 2008, 2008, ISBN: 978-3-200-01612-5, p. 95 - 96
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M. Zolda, R. Kirner: Divide and Measure: CFG Segmentation for the Measurement-Based Analysis of Resource Consumption
Junior Scientist Conference 2008, Wien; in: Proceedings of the Junior Scientist Conference 2008, 2008, ISBN: 978-3-200-01612-5, p. 117 - 118
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A. Kadlec: Neutralizing Timing Anomalies in Superscalar Microprocessors
Junior Scientist Conference 2008, Wien; in: Proceedings of the Junior Scientist Conference 2008, 2008, ISBN: 978-3-200-01612-5, p. 119 - 120
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S. Bünte, R. Kirner: The Acquaintance of Hardware Timing Effects: A Sine Qua Non to Validate Temporal Requirements in Embedded Real Time Systems
Junior Scientist Conference 2008, Wien; in: Proceedings of the Junior Scientist Conference 2008, 2008, ISBN: 978-3-200-01612-5, p. 115 - 116
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M. Schoeberl: Application Experiences with a Real-Time Java Processor
IFAC World Congress, Seoul, Korea; in: Proceedings of the 17th IFAC World Congress, 2008; 6 pages
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B. Huber, C. El Salloum, R. Obermaisser: A Resource Management Framework for Mixed-Criticality Embedded Systems
34th Annual Conference of the IEEE Industrial Electronics Society (IECON'08), Orlando, FL, U.S.A.; in: 34th Annual Conference of the IEEE Industrial Electronics Society (IECON'08), IEEE Computer Society, 2008, ISBN: 978-1-4244-1766-7, p. 2425 - 2431
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I. Wenzel, R. Kirner, B. Rieder, P. Puschner: Measurement-Based Timing Analysis
3rd International Symposium on Leveraging Applications of Formal Methods, Verification and Validation (ISOLA'08), Griechenland; in: Leveraging Applications of Formal Methods, Verification and Validation, Springer Berlin Heidelberg, 2008, ISBN: 978-3-540-88478-1, p. 430 - 444
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W. Puffitsch: Decoupled Root Scanning in Multi-Processor Systems
Embedded Systems Week 2008 (ESWEEK08), Atlanta, Georgia, USA; in: Embedded Systems Week, ACM, 2008, ISBN: 978-1-60558-471-3; 8 pages
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A. Wasicek, C. El Salloum: End-to-End Encryption in the TTSoC Architecture
Embedded Systems Week 2008 (ESWEEK08), Atlanta, Georgia, USA; in: Ebedded Systems Week, ACM, 2008, ISBN: 978-1-60558-471-3; 6 pages
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A. Kadlec, R. Kirner, P. Puschner, A. Prantl, M. Schordan, J. Knoop: Towards a Common WCET Annotation Language: Essential Ingredients
25. Workshop der GI-Fachgruppe "Programmiersprachen und Rechenkonzepte", Bad Honnef; in: Programmiersprachen und Rechenkonzepte, Technischer Bericht des Instituts für Informatik der Christian-Albrechts Universität zu Kiel, 0811 / Kiel (2008); 12 pages
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A. Kadlec, R. Kirner, J. Knoop, A. Prantl, M. Schordan, I. Wenzel: WCET Annotation Languages Reconsidered: The Annotation Language Challenge
25. Workshop der GI-Fachgruppe "Programmiersprachen und Rechenkonzepte", Bad Honnef; in: Programmiersprachen und Rechenkonzepte, Technischer Bericht des Instituts für Informatik der Christian-Albrechts Universität zu Kiel, 0811 / Kiel (2008); 10 pages
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E. Armengaud: Experimental Evaluation of the FlexRay Clock Synchronization Service
20. Workshop für Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Wien; in: 20. Workshop für Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2008, p. 85 - 89
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S. Hepp, G. Klima, A. Kadlec, L. Krammer, W. Luckner, D. Prokesch, S. Resch, A. Wasicek, J. Wilhelm, P Tummeltshammer, M. Delvai: Exploring Hardware Software Partitioning on the Example of a Fingerprint Verification System
16th Austrian Workshop on Microelectronics (Austrochip), Linz; in: Proc. of the 16th Austrian Workshop on Microelectronics 2008, 2008, p. 7 - 12
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H. Moser, U. Schmid: Optimal Deterministic Remote Clock Estimation in Real-Time Systems
12th International Conference On Principles of Distributed Systems, Luxor, Ägypten; in: Principles of Distributed Systems, Lecture Notes in Computer Science / Springer Verlag, Volume 5401 (2008), ISBN: 978-3-540-92220-9, p. 363 - 387
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J. Lechner, M. Delvai: Implementation of a Design Tool for Automated Generation of Four State Logic Circuits
Junior Scientist Conference 2008, Wien; in: Proceedings of the Junior Scientist Conference 2008, 2008, ISBN: 978-3-200-01612-5, p. 85 - 86
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G. Khyo, P. Puschner, M. Delvai: An Operating System for a Time-Predictable Computing Node
The 6th IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS 2008), Capri, Italien; in: Software Technologies for Embedded and Ubiquitous Systems, Lecture Notes in Computer Science / Springer Verlag, 5287 (2008), ISBN: 978-3-540-87784-4, p. 150 - 161
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T. Panhofer, W. Friesenbichler, M. Delvai: Fault Tolerant Four-State Logic by Using Self-Healing Cells
2008 IEEE International Conference on Computer Design, Lake Tahoe, CA, USA; in: 2008 IEEE International Conference on Computer Design, IEEE, 2008, ISBN: 978-1-4244-2658-4; 6 pages
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W. Friesenbichler, T. Panhofer, M. Delvai: Improving Fault Tolerance by Using Reconfigurable Asynchronous Circuits
11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, 2008, Bratislava, Slovakia; in: Design and Diagnostics of Electronic Circuits and Systems, 2008. DDECS 2008. 11th IEEE Workshop on, IEEE, 2008, ISBN: 978-1-4244-2276-0, p. 267 - 270
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K. Ambrosch, M. Humenberger, W. Kubinger, A. Steininger: Extending two non-parametric transforms for FPGA based stereo matching using bayer filtered cameras
IEEE Conference on Computer Vision and Pattern Recognition, 2008. CVPR '08, Anchorage, Alaska, USA; in: CVPR Workshops 2008. IEEE Computer Society Conference on Computer Vision and Pattern Recognition Workshops, 2008., 2008, ISBN: 978-1-4244-2339-2, p. 1 - 8
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P. Milbredt, A. Steininger, M. Horauer: Automated Testing of FlexRay Clusters for System Inconsistencies in Automotive Networks
IEEE International Workshop on Electronic Design, Test and Applications, Hong-Kong; in: 4th IEEE International Symposium on Electronic Design, Test and Applications, 2008. DELTA 2008., 2008, ISBN: 978-0-7695-3110-6, p. 533 - 538
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J. Grahsl, T. Handl, A. Steininger: Exploring the Usefulness of the Gate-level Stuck-at Fault Model for Muller C-Elements
20. GI/ITG/GMM Workshop Testmethoden und Vuverlässigkeit von Schaltungen und Systemen, Wien; in: 20. Workshop Testmethoden und Vuverlässigkeit von Schaltungen und Systemen, 2008, p. 165 - 169
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E. Armengaud, M Függer, A. Steininger: Safe deterministic replay for stimulating the clock synchronization algorithm in time-triggered systems
WFCS, Dresden, Germany; in: IEEE International Workshop on Factory Communication Systems, 2008. WFCS 2008., 2008, ISBN: 978-1-4244-2349-1, p. 277 - 286
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P. Milbredt, M. Horauer, A. Steininger: An Investigation of the Clique Problem in Flex Ray
SIES´2008 Third international symposium on industrial embedded systems, Montpellier - La Grande Motte, France; in: International Symposium on Industrial Embedded Systems, 2008., 2008, ISBN: 978-1-4244-1995-1, p. 200 - 207
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C. Pitter: Time-predictable memory arbitration for a Java chip-multiprocessor
Workshop on Java Technologies for Real-time and Embedded Systems (JTRES), Santa Clara, California; in: Proceedings of the 6th international workshop on Java technologies for real-time and embedded systems, ACM, 2008, ISBN: 978-1-60558-337-2, p. 115 - 122
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M. Schoeberl, W. Puffitsch: Non-blocking object copy for real-time garbage collection
Workshop on Java Technologies for Real-time and Embedded Systems (JTRES), Santa Clara, California; in: Proceedings of the 6th international workshop on Java technologies for real-time and embedded systems, ACM, 2008, ISBN: 978-1-60558-337-2, p. 77 - 84
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P. Puschner, M. Schoeberl: On Composable System Timing, Task Timing, and WCET Analysis
WCET 2008, Prague, Czech Republic; in: Worst-Case Execution Time Analysis; Proceedings of the 8th International Workshop (WCET 2008), Österreichische Computer Gesellschaft, 2008, ISBN: 978-3-85403-237-3, p. 91 - 101
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W. Binder, A. Villazón, M. Schoeberl, P. Moret: Cache-aware Cross-profiling for Java Processors
International Conference on Compilers, Architecture and Synthesis for Embedded Systems [CASES 07], Atlanta,Georgia, USA; in: Ebedded Systems Week, 2008, ISBN: 978-1-60558-471-3; 9 pages
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R. Obermaisser, B. Frömel, C. El Salloum, B. Huber: Integrating safety and multimedia subsystems on a Time-Triggered System-on-a-Chip
Proceedings IEEE INDIN 2008, 6th IEEE International Conference on Industrial Informatics, Daejeon, Korea; in: Proceedings IEEE INDIN 2008, 6th IEEE International Conference on Industrial Informatics, IEEE, 2008, ISBN: 978-1-4244-2171-8, p. 270 - 275
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R. Obermaisser, H. Kraut, C. El Salloum: A Transient-Resilient System-on-a-Chip Architecture with Support for On-Chip and Off-Chip TMR
Seventh European Dependable Computing Conference (EDCC-7), Kaunas, Lithuania; in: Seventh European Dependable Computing Conference (EDCC-7), IEEE Computer Society, 2008, ISBN: 978-0-7695-3138-0, p. 123 - 134
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R. Obermaisser, C. El Salloum, B. Huber, H. Kopetz: The Time-Triggered System-on-a-Chip Architecture
IEEE International Symposium on Industrial Electronics, 2008. ISIE 2008, Cambridge, UK; in: IEEE International Symposium on Industrial Electronics, 2008. ISIE 2008, 2008, ISBN: 978-1-4244-1666-0, p. 1941 - 1947
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C. Pitter: JopCMP - A Java Chip-Multiprocessor for Real-time Systems
4th International Workshop on Reconfigurable Communication Centric System-on-Chips, Workshop Proceedings (ReCoSoC), Barcelona, Spain; in: 4th International Workshop on Reconfigurable Communication Centric System-on-Chips, Workshop Proceedings, DFG, 2008, ISBN: 978-84-691-3603-4; 3 pages
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W. Binder, M. Schoeberl, P. Moret, A. Villazón: Cross-Profiling for Embedded Java Processors
Fifth International Conference on the Quantitative Evaluation of Systems, St. Malo, France; in: Fifth International Conference on the Quantitative Evaluation of Systems, IEEE Computer Society, 2008, ISBN: 978-0-7695-3360-5, p. 287 - 296
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C. Pitter, M. Schoeberl: Performance Evaluation of a Java Chip-Multiprocessor
SIES´2008 Third international symposium on industrial embedded systems, Montpellier - La Grande Motte, France; in: SIES´2008 Third international symposium on industrial embedded systems, 2008, ISBN: 978-1-4244-1995-1, p. 34 - 42
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C. El Salloum, R. Obermaisser, B. Huber, H. Kopetz: A Novel Naming Scheme for System-on-a-Chips Supporting Dynamic Resource Management
Seventh European Dependable Computing Conference (EDCC-7), Kaunas, Lithuania; in: Seventh European Dependable Computing Conference (EDCC-7), IEEE Computer Society, 2008, ISBN: 978-0-7695-3138-0, p. 135 - 144
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V. Mikolasek, A. Ademaj, S. Racek: Segmentation of Standard Ethernet Messages in the Time-Triggered Ethernet
IEEE International Conference on Emerging Technologies and Factory Automation (ETFA), Hamburg, Germany; in: Proceedings of the 13th IEEE International Conference on Emerging Technologies and Factory Automation, IEEE, 2008, ISBN: 1-4244-1506-3, p. 392 - 399
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C. Paukovits, H. Kopetz: Concepts of Switching in the Time-Triggered Network-on-Chip
14th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2008), Kaohsiung, Taiwan; in: 14th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, IEEE Computer Society, 2008, ISSN: 1533-2306, p. 120 - 129
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H. Kopetz: Wrong Assumptions and Neglected Areas in Embedded Systems Research
The 11th IEEE Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, Orlando, Florida, USA; in: The 11th IEEE Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, IEEE Computer Society, 2008, ISBN: 978-0-7695-3132-8, p. 360
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H. Kopetz: The Complexity Challenge in Embedded System Design
The 11th IEEE Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, Orlando, Florida, USA; in: The 11th IEEE Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, IEEE Computer Society, 2008, ISBN: 978-0-7695-3132-8, p. 3 - 12
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R. Kirner, P. Puschner: Obstacles in Worst-Case Execution Time Analysis
The 11th IEEE Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, Orlando, Florida, USA; in: The 11th IEEE Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, IEEE Computer Society, 2008, ISBN: 978-0-7695-3132-8, p. 333 - 339
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S. Korsholm, M. Schoeberl, A. Ravn: Interrupt Handlers in Java
The 11th IEEE Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, Orlando, Florida, USA; in: The 11th IEEE Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, IEEE Computer Society, 2008, ISBN: 978-0-7695-3132-8, p. 453 - 457
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T. Harmon, M. Schoeberl, R. Kirner, R. Klefstad: Toward Libraries for Real-time Java
The 11th IEEE Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, Orlando, Florida, USA; in: The 11th IEEE Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, IEEE Computer Society, 2008, ISBN: 978-0-7695-3132-8, p. 458 - 462
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M. Schoeberl, C. Thalinger, S. Korsholm, A. Ravn: Hardware Objects for Java
The 11th IEEE Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, Orlando, Florida, USA; in: The 11th IEEE Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, IEEE Computer Society, 2008, ISBN: 978-0-7695-3132-8, p. 445 - 452
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T. Harmon, M. Schoeberl, R. Kirner, R. Klefstad: A Modular Worst-case Execution Time Analysis Tool for Java Processors
14th IEEE Real-Time and Embedded Technology and Applications Symposium, St. Louis, Missouri, USA; in: 14th IEEE Real-Time and Embedded Technology and Applications Symposium, IEEE Computer Society, 2008, ISBN: 978-0-7695-3146-5; 11 pages
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N. Holsti, J. Gustafsson, G. Bernat, C. Ballabriga, A. Bonenfant, R. Bourgade, H. Cassé, D. Cordes, A. Kadlec, R. Kirner, J. Knoop, P. Lokuciejewski, N. Merriam, M. de Michiel, A. Prantl, B. Rieder, C. Rochange, P. Sainrat, M. Schordan: WCET Tool Challenge 2008: Report
WCET 2008, Prague, Czech Republic; in: Worst-Case Execution Time Analysis; Proceedings of the 8th International Workshop (WCET 2008), Österreichische Computer Gesellschaft, 2008, ISBN: 978-3-85403-237-3, p. 149 - 171
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D. Ebner, F. Brandner, B. Scholz, A. Krall, P. Wiedermann, A. Kadlec: Generalized instruction selection using SSA-graphs
ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems, Tucson, Arizona, USA; in: Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems, ACM - Association for Computing Machinery, 2008, ISBN: 978-1-60558-104-0, p. 31 - 40
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G. Fuchs, M Függer, U. Schmid, A. Steininger: Mapping a Fault-Tolerant Distributed Algorithm to Systems on Chip
11th EUROMICRO Conference on Digital System Design (DSD 2008), Parma, Italien; in: 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, DSD 2008., IEEE, 2008, ISBN: 978-0-7695-3277-6, p. 242 - 249
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U. Schmid (invited): Distributed Algorithms and VLSI
10 International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2008), Detroit, USA; in: Stabilization, Safety, and Security of Distributed Systems, Lecture Notes in Conputer Science / Springer Verlag, 5340 (2008), ISSN: 0302-9743, p. 3
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P. Robinson, U. Schmid: The Asynchronous Bounded Cycle Model
10 International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2008), Detroit, USA; in: Stabilization, Safety, and Security of Distributed Systems, Lecture Notes in Conputer Science / Springer Verlag, 5340 (2008), ISSN: 0302-9743, p. 246 - 262
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U. Schmid, P. Robinson: Brief Announcement: The Asynchronous Bounded Cycle Model
ACM Symposium on Principles of Distributed Computing, Toronto, Canada; in: PODC'08 Proceedings of the 27th Annual ACM Symposium on Principles of Distributed Computing, Association for Computing Machinery (ACM), 2008, ISBN: 978-1-59593-989-0, p. 423
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R. Kirner, A. Kadlec, P. Puschner, A. Prantl, M. Schordan, J. Knoop: Towards a Common WCET Annotation Languge: Essential Ingredients
WCET 2008, Prague, Czech Republic; in: Worst-Case Execution Time Analysis; Proceedings of the 8th International Workshop (WCET 2008), Österreichische Computer Gesellschaft, 2008, ISBN: 978-3-85403-237-3, p. 53 - 65
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W. Elmenreich, G. Klingler: Genetic Evolution of a Neural Network for the Autonomous control of a Four-Wheeled Robot
Mexican International Conference on Artificial Intelligence, Aguascalientes, Mexico; in: Sixth Mexican International Conference on Artificial Intelligence, A. Gelbukh, á. Kuri Morales (ed.); IEEE Computer Society, 2007, ISBN: 978-0-7695-3124-3, p. 396 - 406
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M. Umlauft, W. Elmenreich (invited): QoS-aware Ant Routing with Colored Pheromones in Wireless Mesh Networks
Self-Organization Workshop at Autonomics '08, Turin, Italien; in: Second International Conference on Autonomic Computing and Communication Systems (AUTONOMICS '08), A. Manzalini et al. (ed.); Acm / Icst, 2008, ISBN: 978-963-9799-34-9; 6 pages
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W. Forster, C. Kutschera, A. Steininger, K. Göschka: Automated Generation of Explicit Connectors for Component Based Hardware/Software Interaction in Embedded Real-Time Systems
16th International Workshop on Parallel and Distributed Real-Time Systems (WPDRTS 2008), (IPDPS 2008), Miami, Florida, USA; in: Proceedings of the 16th International Workshop on Parallel and Distributed Real-Time Systems (WPDRTS 2008), (IPDPS 2008), IEEE Computer Society, 2008, ISBN: 978-1-4244-1694-3, p. 1 - 8
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C. Trödhandl, B. Weiss: A Concept for Hybrid Fault Injection in Distributed Systems
Testing: Academic and Industrial Conference --- Practice and Research Techniques, Windsor, United Kingdom; in: Testing: Academic and Industrial Conference --- Practice and Research Techniques (Fast Abstracts), 2008
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T. Wilson: Low-Complexity Linear-Feedback Equalization for ATSC DTV
International Conference on Consumer Electronics (ICCE), LasVegas, USA; in: 2008 Digest of Technical Papers International Conference on Consumer Electronics, IEEE, 2008, ISBN: 1-4244-1459-8
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T. Wilson: Baud Rate Symbol Timing Synchronization for 8-VSB ATSC DTV Receivers
ISCE 2007, Dallas, TExas, USA; in: The 11th Annual IEEE International Symposium on Consumer Electronics, IEEE, 2007
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T. Wilson: Robust Baud Rate Blind Equalization for ATSC DTV Receivers
Sixth International Conference on Information, Communication & Signal Processing [ICICS07], Singapore; in: Sixth International Conference on Information, Communication & Signal Processing, IEEE, 2007, ISBN: 1-4244-0983-7
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T. Wilson: Blind Linear Feedback Equalization for ATSC DTV Reception
International Conference on Intelligent & Advanced Systems (ICIAS07), Kuala Lumpur, MALAYSIA; in: ICIAS2007 Conference Proceedings, IEEE, 2007, ISBN: 1-4244-1355-9
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A. Kadlec, R. Kirner: On the Difficulty of Building a Precise Timing Model for Real-Time Programming
14. Kolloquium "Programmiersprachen und Grundlagen der Programmierung (KPS'07)", Timmendorfer Strand, Germany; in: 14. Kolloquium Programmiersprachen und Grundlagen der Programmierung, 2007; 7 pages
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H. Kopetz: Zuverlässige Elektronik-Systeme im Verkehrswesen
Conference of the Academy of Science of Northrhine - Westfalia, Northrhine - Westfalia, Germany; in: Informatik bewegt - Informationstechnik in Verkehr und Logistik, acatech, 2007, ISBN: 978-3-8167-7368-9, p. 55 - 79
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M. Schoeberl: SimpCon - a Simple and Efficient SoC Interconnect
Austrochip, Graz, Austria; in: Proceedings of the 15th Austrian Workhop on Microelectronics, Austrochip 2007, IEEE Austria Section / TU Graz, 2007, ISBN: 978-3-902465-87-0, p. 153 - 161
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U. Schmid (invited): A Perspective of Fault-Tolerant Clock Synchronization
2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication, Wien; in: IEEE Symposium on Precision Clock Synchronization for Measurement, Control and Communication, 2007
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R. Obermaisser, P. Peti: The Fault Assumptions in Distributed Integrated Architectures
SAE 2007 AeroTech Congress & Exhibition, Los Angeles, California, USA; in: Aerospace Safety- Design, Maintenance/Operations, and Safety/Security, SAE, SP-2141 (2007), ISBN: 978-0-7680-1961-2
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R. Obermaisser, D. Riezler: HIS/VectorCAN Driver API on Top of a Time-Triggered Communication Protocol
SAE World Congress & Exhibition, Detroit, MI, USA; in: Proc. of the SAE World Congress & Exhibition, SAE, In-Vehicle Networks, 2007 - SP-2102 (2007), ISBN: 978-0-7680-1892-9
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B. Leiner, M. Schlager, R. Obermaisser, B. Huber: A Comparison of Partitioning Operating Systems for Integrated Systems
SAFECOMP, Nuremberg, Germany; in: Computer Safety, Reliability, and Security, Springer, LNCS Vol 4680 (2007), ISBN: 978-3-540-75100-7, p. 342 - 355
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H. Kopetz, R. Obermaisser, C. El Salloum, B. Huber: Automotive Software Development for a Multi-Core System-on-a-Chip
SEAS'07, Minneapolis, USA; in: Fourth International Workshop on Software Engineering for Automotive Systems, IEEE, 2007, ISBN: 978-84-89315-47-1, p. 101 - 113
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R. Obermaisser, P. Peti: Detection of Out-of-Norm Behaviors in Event-Triggered Virtual Networks
IEEE International Conference on Industrial Informatics - INDIN 2007, Vienna, Austria; in: 5th IEEE International Conference on Industrial Informatics (INDIN 2007), IEEE, VOL2 (2007), ISBN: 978-1-4244-0851-1, p. 971 - 976
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A. Wasicek, W. Elmenreich: Internet Firewalls in the DECOS System-on-a-Chip Architecture
IEEE International Conference on Industrial Informatics - INDIN 2007, Vienna, Austria; in: Proceedings of the 5th International Conference on Industrial Informatics, IEEE, VOL2 (2007), ISBN: 978-1-4244-0851-1, p. 983 - 988
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R. Kirner: On the Halting Problem of Finite-State Programs
14. Kolloquium "Programmiersprachen und Grundlagen der Programmierung (KPS'07)", Timmendorfer Strand, Germany; in: 14. Kolloquium Programmiersprachen und Grundlagen der Programmierung, 2007; 6 pages
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B. Rieder, I. Wenzel, K. Steinhammer, P. Puschner: Using a Runtime Measurement Device with Measurement-Based WCET Analysis
International Embedded Systems Symposiom (IESS'07), Irvine, Orange County, in Southern California (USA); in: Embedded System Design: Topics, Techniques and Trends, Springer Boston, Volume 231/2007 (2007), ISBN: 978-0-387-72257-3, p. 15 - 26
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R. Obermaisser, H. Kopetz, C. El Salloum, B. Huber: Error Containment in the Time-Triggered System-On-a-Chip Architecture
International Embedded Systems Symposiom (IESS'07), Irvine, Orange County, in Southern California (USA); in: Embedded System Design: Topics, Techniques and Trends, Springer Boston, Volume 231/2007 (2007), ISBN: 978-0-387-72257-3, p. 339 - 352
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H. Kopetz: Modeling of Software-Hardware Complexes
International Embedded Systems Symposiom (IESS'07), Irvine, Orange County, in Southern California (USA); in: Embedded System Design: Topics, Techniques and Trends, Springer Boston, Volume 231/2007 (2007), ISBN: 978-0-387-72257-3, p. 431 - 432
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K. Steinhammer, A. Ademaj: Hardware Implementation of the Time-Triggered Ethernet Controller
International Embedded Systems Symposiom (IESS'07), Irvine, Orange County, in Southern California (USA); in: Embedded System Design: Topics, Techniques and Trends, Springer, Volume 231/2007 (2007), ISBN: 978-0-387-72257-3, p. 325 - 338
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E. Anceaume, C. Delporte-Gallet, H. Fauconnier, M. Hurfin, J. Widder: Clock Synchronization in the Byzantine-Recovery Failure Model
International Conference On Principles Of Distributed Systems (OPODIS), Guadeloupe; in: International Conference On Principles Of DIstributed System, 2007, p. 90 - 104
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K. Ambrosch, M. Humenberger, W. Kubinger, A. Steininger: Hardware Implementation of an SAD based stereo vision algorithm
Third IEEE Workshop on Embedded Computer Vision, Minneapolis; in: Proceedings of Third IEEE Workshop on Embedded Computer Vision, 2007
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M. Horauer, E. Armengaud, A. Steininger: Concepts and Tools for the Test of the Communication Sub-System of Time-Triggered Distributed Embedded Systems
International Conference on Design Engineering Technical Conferences & Computers and Information in Engineering (ASME), Las Vegas; in: ASME 2007 International Conference on Design Engineering Technical Conferences & Computers and Information in Engineering, 2007
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T. Kottke, A. Steininger: A Fail-Silent Reconfigurable Superscalar Processor
13th Pacific Rim International Symposium on Dependable Computing (PRDC 07), Melbourne; in: 13th Pacific Rim International Symposium on Dependable Computing (PRDC'07), Melbourne, 2007, p. 232 - 239
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C. Angerer, O. Cevan, L. Fauster, Y. Huang, B. Huber, V. Legourski, S. Pirker, T. Polzer, D. Reichhard, D. Rigler, A. Schuster, B. Weirich, P Tummeltshammer, M. Delvai: Exploring Hardware Software Partitioning on the Example of a Face Recognition System
Austrochip, Graz; in: Austrochip - Workshop on Microelectronics, 2007, ISBN: 978-3-902465-87-0, p. 121 - 127
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E. Armengaud, A. Steininger, A. Hanzlik: The Effect of Quartz Drift on Convergence-Average based Clock Synchronization
IEEE International Conference on Emerging Technologies and Factory Automation (ETFA), Patras; in: Proceedings of the 12th IEEE Conference on Emerging Technologies and Factory Automation, 2007, p. 1123 - 1130
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E. Armengaud, W. Forster: A Novel Interconnection Approach for Globally Asynchronous Locally Synchronous Circuits
Austrochip, Graz; in: Austrochip - Workshop on Microelectronics, 2007, p. 107 - 113
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T. Handl, A. Steininger, G. Kempf: Adopting the Scan Approach for a Fault Tolerant Asynchronous Clock Generation Circuit
International Design and Test Workshop (IDT), Kairo; in: Proceedings IDT'07 - The Second International Design and Test Workshop, 2007, p. 115 - 119
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M. Delvai, T. Panhofer: SELF-HEALING CIRCUITS FOR SPACE-APPLICATIONS
17th International Conference on Field Programmable Logic and Applications (FPL2007), Amsterdam; in: Proceedings of 17th INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS, 2007, ISBN: 1-4244-1060-6, p. 505 - 506
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J. Grahsl, T. Handl, A. Steininger, G. Kempf: SAFE - A Scalable Environment for Automated Transistor Level Fault Effect Analysis
Austrochip, Graz; in: Austrochip - Workshop on Microelectronics, 2007, p. 91 - 98
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J. Widder, G. Gridling, B. Weiss, J. Blanquart: Synchronous Consensus with Mortal Byzantines
IEEE Conference on Dependable Systems and Networks (DSN), Edinburgh; in: Proceedings of the 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2007
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M. Biely, M. Hutle, L. Penso, J. Widder: Relating Stabilizing Timing Assumptions to Stabilizing Failure Detectors Regarding Solvability and Efficiency
Ninth International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2007), Paris; in: stabilization, 2007
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R. Kirner: SCCP/x - A Compilation Profile to Support Testing and Verification of Optimized Code
International Conference on Compilers, Architecture and Synthesis for Embedded Systems [CASES 07], Salzburg, Austria; in: Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems, ACM, 2007, ISBN: 978-1-59593-826-8, p. 38 - 42
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R. Kirner, M. Schoeberl: Modeling the function cache for worst-case execution time analysis
44th Design Automation Conference (DAC'07), San Diego, California/USA; in: Proceedings of the 44th annual conference on Design automation, ACM, 2007, ISBN: 978-1-59593-627-1, p. 471 - 476
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C. Pitter, M. Schoeberl: Time Predictable CPU and DMA Shared Memory Access
17th International Conference on Field Programmable Logic and Applications (FPL2007), Amsterdam, Netherlands; in: 2007 International Conference on Field Programmable Logic and Applications (FPL), IEEE, 07EX1708C (2007), ISBN: 1-4244-1060-6, p. 317 - 322
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M. Schoeberl: A Time-Triggered Network-on-Chip
17th International Conference on Field Programmable Logic and Applications (FPL2007), Amsterdam, Netherlands; in: 2007 International Conference on Field Programmable Logic and Applications (FPL), IEEE, 07EX1708C (2007), ISBN: 1-4244-1060-6, p. 377 - 382
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W. Puffitsch, M. Schoeberl: picoJava-II in an FPGA
Workshop on Java Technologies for Real-time and Embedded Systems (JTRES), Vienna, Austria; in: Proceedings of the 5th international workshop on Java technologies for real-time and embedded systems, ACM, 2007, 978-59593-813-8, p. 213 - 221
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M. Schoeberl: Architecture for object-oriented programming languages
Workshop on Java Technologies for Real-time and Embedded Systems (JTRES), Vienna, Austria; in: Proceedings of the 5th international workshop on Java technologies for real-time and embedded systems, ACM, 2007, 978-59593-813-8, p. 57 - 62
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M. Schoeberl, J. Vitek: Garbage collection for safety critical Java
Workshop on Java Technologies for Real-time and Embedded Systems (JTRES), Vienna, Austria; in: Proceedings of the 5th international workshop on Java technologies for real-time and embedded systems, ACM, 2007, 978-59593-813-8, p. 85 - 93
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C. Pitter, M. Schoeberl: Towards a Java multiprocessor
Workshop on Java Technologies for Real-time and Embedded Systems (JTRES), Vienna, Austria; in: Proceedings of the 5th international workshop on Java technologies for real-time and embedded systems, ACM, 2007, 978-59593-813-8, p. 144 - 151
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M. Biely, B. Charron-Bost, A. Gaillard, M. Hutle, A. Schiper, J. Widder: Tolerating Corrupted Communication
ACM Symposium on Principles of Distributed Computing, Portland; in: 26th ACM Symposium on Principles of Distributed Computing (PODC'07), 2007, p. 244 - 253
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R. Kirner, J. Knoop, A. Prantl, M. Schordan, I. Wenzel: WCET Analysis: The Annotation Language Challenge
7th International Workshop on Worst-Case Execution Time Analysis (satellite event to ECRTS´07), Pisa; in: Preliminary Proceedings of the 7th International Workshop on Worst-Case Execution Time Analysis (satellite event to ECRTS´07), 2007, p. 77 - 92
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R. Kirner, J. Knoop, A. Prantl, M. Schordan, I. Wenzel: WCET Analysis: The Annotation Language Challenge
7th International Workshop on Worst-Case Execution Time Analysis (satellite event to ECRTS´07), Pisa, Italy; in: Post-Workshop Proceedings of the 7th International Workshop on Worst-Case Execution Time Analysis, 2007, p. 83 - 99
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H. Paulitsch, R. Obermaisser, C. El Salloum, B. Huber, H. Kopetz: A Diagnostic Unit for the time-triggered System-on-a-Chip architecture
Design, Automation and Test in Europe Conference (DATE'07), Nice, France; in: Workshop Digest, Diagnostic Services in Network-on-Chips, DATE'07, 2007; 2 pages
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C. El Salloum, R. Obermaisser, B. Huber, H. Paulitsch, H. Kopetz: A time-triggered system-on-a-chip architecture with integrated support for diagnosis
Design, Automation and Test in Europe Conference (DATE'07), Nice, France; in: Workshop Digest, Diagnostic Services in Network-on-Chips, DATE'07, 2007; 2 pages
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M. Schoeberl, H. Sondergaard, B. Thomsen, A. Ravn: A Profile for Safety Critical Java
The Tenth IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC 2007), Santorini, Greece; in: 10th IEEE International Symposium on Object and component-oriented Real-time distributed Computing (ISORC2007), IEEE, 2007, ISBN: 0-7695-2765-5, p. 94 - 101
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R. Kirner, P. Puschner: Time-Predictable Task Preemption for Real-Time Systems with Direct-Mapped Instruction Cache
The Tenth IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC 2007), Santorini, Greece; in: 10th IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC'07), IEEE, 2007, ISBN: 0-7695-2765-5, p. 87 - 92
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S. Kandl, R. Kirner, P. Puschner: Automated Formal Verification and Testing of C Programs for Embedded Systems
The Tenth IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC 2007), Santorini, Greece; in: 10th IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC 2007), IEEE, 2007, ISBN: 0-7695-2765-5, p. 373 - 381
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A. Ademaj, H. Kopetz: Time-Triggered Ethernet and IEEE 1588 Clock Synchronization
2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication, Vienna; in: ISPCS 2007 Proceedings, 2007, ISBN: 1-4244-1064-9; 3 pages
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H. Kopetz: Why do we need a Sparse Global Time-Base in Dependable Real-time Systems?
2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication, Vienna; in: ISPCS Proceedings, 2007, ISBN: 1-4244-1064-9; 5 pages
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W. Steiner: Advancements in Dependable Time-Triggered Communication
5th IFIP Workshop on Software Technologies for Future Embedded & Ubiquitous Systems (SEUS 2007), Santorini, Greece; in: The 5th IFIP Workshop on Software Technologies for Future Embedded & Ubiquitous Systems, 2007; 10 pages
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M. Schlager, R. Obermaisser, W. Elmenreich: A Framework for Hardware-in-the-Loop Testing of an Integrated Architecture
5th IFIP Workshop on Software Technologies for Future Embedded & Ubiquitous Systems (SEUS 2007), Santorini, Greece; in: The 5th IFIP Workshop on Software Technologies for Future Embedded & Ubiquitous Systems, 2007; 20 pages
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M. Schoeberl: Mission Modes for Safety Critical Java
5th IFIP Workshop on Software Technologies for Future Embedded & Ubiquitous Systems (SEUS 2007), Santorini, Greece; in: The 5th IFIP Workshop on Software Technologies for Future Embedded & Ubiquitous Systems, 2007; 10 pages
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W. Elmenreich: A Review on System Architectures for Sensor Fusion Applications
5th IFIP Workshop on Software Technologies for Future Embedded & Ubiquitous Systems (SEUS 2007), Santorini, Greece; in: The 5th IFIP Workshop on Software Technologies for Future Embedded & Ubiquitous Systems, 2007; 12 pages
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I. Wenzel, R. Kirner, B. Rieder, P. Puschner: Cross-Platform Verification Framework for Embedded Systems
5th IFIP Workshop on Software Technologies for Future Embedded & Ubiquitous Systems (SEUS 2007), Santorini, Greece; in: The 5th IFIP Workshop on Software Technologies for Future Embedded & Ubiquitous Systems, 2007; 12 pages
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A. Ademaj, A. Hanzlik, H. Kopetz: Tolerating Arbitrary Failures in a Master-Slave Clock-Rate Correction Mechanism for Time-Triggered Fault-Tolerant Distributed Systems with Atomic Broadcast
International Conference on Real-Time and Network Systems (RTNS), Nancy, Frankreich; in: Proceedings of the 15th International Conference on Real-Time and Network Systems (RTNS'07), Institut National Polytechnique de Lorraine, Nancy, Frankreich (2007), ISBN: 2-905267-53-4, p. 215 - 224
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S. Kandl: Abstraction Techniques for Extracted Automata Models
International Conference on Real-Time and Network Systems (RTNS), Nancy; in: Junior Researcher Workshop on Real-Time Computing 2007 (JRWRTC´07), 2007, p. 35 - 38
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W. Elmenreich, M. Rosenblattl, A. Wolf: Fixed Point Library According to ISO/IEC Standard DTR 18037 for Atmel AVR Processors
5th Workshop on Intelligent Solutions in Embedded Systems - (WISES'07), Madrid; in: Proceedings of the Fifth International Workshop on Intelligent Solutions in Embedded Systems, IEEE, 2007, ISBN: 978-84-89315-47-1, p. 101 - 113
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B. Huber, R. Obermaisser: Model-Based Development of Integrated Computer Systems: Modeling the Execution Platform
5th Workshop on Intelligent Solutions in Embedded Systems - (WISES'07), Madrid, Spanien; in: Proceedings of the Fifth International Workshop on intelligent Solutions in Embedded Systems, IEEE, 2007, ISBN: 978-84-89315-47-1, p. 151 - 164
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P. Jahn, T. Polzer: Graphical Microcontroller Programming (GMCP)
IEEE International Conference on Industrial Informatics - INDIN 2007, Vienna, Austria
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G. Klingler, W. Elmenreich: Design of a Universal Gateway for theTime-Triggered Fieldbus Protocol TTP/A
IEEE International Conference on Industrial Informatics - INDIN 2007, Vienna, Austria
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R. Leidenfrost, W. Elmenreich: Establishing Wireless Time-triggered Communication using a Firefly Clock Synchronization Approach
IEEE International Conference on Industrial Informatics - INDIN 2007, Vienna, Austria
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A. Kößler, M. Hofer, T. Mair, W. Elmenreich: A Platform for Teaching and Research on Distributed Real-Time Systems
IEEE International Conference on Industrial Informatics - INDIN 2007, Vienna, Austria
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U. Schmid, A. Steininger, H. Veith: Towards a Systematic Design of Fault-Tolerant Asynchronous Circuits
GMM/GI/ITG-Fachtagung Zuverlässigkeit und Entwurf, München; in: Fachtagung Zuverlässigkeit und Entwurf, VDE Verlag, 2007, ISBN: 978-3-8007-3023-0, p. 173 - 174
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W. Elmenreich, H. Piontek, J. Kaiser: Interface Design for Real-Time Smart Transducer Networks - Examining COSMIC, LIN, and TTP/A as Case Study
International Conference on Real-Time and Network Systems (RTNS), Nancy, France; in: Proceedings of the 15th International Conference on Real-Time and Network Systems, Institut National Polytechnique de Lorraine, Nancy, France (2007), ISBN: 2-905267-53-4, p. 195 - 204
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T. Kottke, A. Steininger: Vergleich zweier zwischen Sicherheit und Performanz rekonfigurierbarer Prozessorsysteme
19. ITG/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Errlangen; in: 19. Workshop - Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2007
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T. Handl, A. Steininger, G. Kempf: An Efficient Test Strategy for a Fault-Tolerant Clock Generator for Systems-on-Chip
19. ITG/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Errlangen; in: 19. Workshop - Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2007, p. 66 - 70
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W. Elmenreich, A. Schörgendorfer (invited): Fusion of Continuous-Valued Sensor Measurements using Statistical Analysis
International Symposium on Mathematical Methods in Engineering, Ankara, Turkey; in: Proceedings of the International Symposium on Mathematical Methods in Engineering, K. Tas, D. Baleanu, J.A.T. Machado (ed.); 2006, ISBN: 975-6734-04-3; 10 pages
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M. Schlager, E. Erkinger, W. Elmenreich, T. Losert: Benefits and Implications of the DECOS Encapsulation Approach
International IEEE Conference on Intelligent Transportation Systems, Vienna, Austria; in: Proceedings of the 8th International IEEE Conference on Intelligent Transportation Systems, IEEE Press, 2005, ISBN: 0-7803-9215-9, p. 13 - 18
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H. Kopetz (invited): Pulsed Data Streams
IFIP Working Conference on Distributed and Parallel Embedded Systems, Braga, Portugal; in: 5th IFIP Working Conference on Distributed and Parallel Embedded Systems, Proceedings, B. Kleinjohann, L. Kleinjohann, R.J. Machado, C. Pereira, P. Thiagarajan (ed.); Springer, 2006, ISBN: 0-387-39361-7, p. 105 - 114
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H. Kopetz (invited): TTA Supported Service Availability
International Service Availability Symposium, Berlin, Germany; in: Service Availability - Second International Availability Symposium, M. Malek, E. Nett, N. Suri (ed.); Springer, LNCS 3694 (2005), ISBN: 3-540-29103-2, p. 1 - 14
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A. Steininger: The DARTS project
ESA Workshop, Wien
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A. Steininger: The ECS group's hardware related research activities
Firma Freescale, München
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J. Widder, G. Gridling, B. Weiss, J. Blanquart (invited): Synchronous Consensus with Mortal Byzantines
Dagstuhl Seminar 06371. From Security to Dependability, Dagstuhl
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U. Schmid (invited): Wissenschaftliche Forschung - Quo vadis?
IKT in Österreich 2006, Wien
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H. Moser, B. Thallner: Reconciling Distributed Computing Models and Real-Time Systems
IEEE Real-Time Systems Symposium, Rio de Janiero; in: Proceedings of the 27th IEEE Real-Time Systems Symposium (RTSS'06), 2006, p. 73 - 76
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H. Moser, B. Thallner: Construction of a Fault-Tolerant Wireless Communication Topology Using Distributed Agreement
Workshop on Dependability issues in wireless ad hoc networks and sensor networks (DIWANS), Los Angeles; in: DIWANS '06: Proceedings of the 2006 workshop on Dependability issues in wireless ad hoc networks and sensor networks, 2006, p. 35 - 43
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H. Moser, U. Schmid: Construction of a Fault-Tolerant Wireless Communication Topology Using Distributed Agreement
Junior Scientist Conference, Wien; in: Junior Scientiest Conferenve 2006, 2006, p. 47 - 48
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H. Moser, U. Schmid: Optimal clock synchronization revisited: Upper and lower bounds in real-time systems
International Conference On Principles Of Distributed Systems (OPODIS), Bordeaux; in: Principles of Distributed Systems, 2006, p. 94 - 109
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M. Schlager, W. Elmenreich, I. Wenzel: Interface Design for Hardware-in-the-Loop Simulation
IEEE International Symposium on Industrial Electronics, Montreal, Canada; in: Proceedings of the 2006 IEEE International Symposium on Industrial Electronics, IEEE Press, Piscataway, NJ, USA (2006), ISBN: 1-4244-0497-5, p. 1554 - 1559
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C. Trödhandl, B. Weiss, T. Handl, M. Proske (invited): Environments for Remote Teaching in Embedded Systems Courses
ERCIM / DECOS Workshop on Dependable Embedded Systems, Cavtat; in: 2006 ERCIM / DECOS Workshop on Dependable Embedded Systems, 2006
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M. Hutle, D. Malkhi, U. Schmid, L. Zhou: Brief Announcement: Chasing the Weakest System Model for Implementing Omega and Consensus
8th International Symposium on Stabilization, Safety, and Security of Distributed Systems, Dallas; in: Stabilization, Safety, and Security of Distributed Systems, 2006
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M. Proske, C. Trödhandl, T. Handl: Distance Labs - Embedded Systems @home
Edutainment 2006, Zhejiang; in: Journal of Computational Information Systems, 2006, p. 435 - 444
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M. Proske, C. Trödhandl: Anytime, Everywhere - Approaches to Distance Labs in Embedded Systems Education
ICTTA06: International Conference on Information & Communication Technologies, Damascus; in: Proceedings of ICTTA 2006, 2006; 6 pages
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R. Obermaisser, P. Peti: A Fault Hypothesis for Integrated Architectures
4th Workshop on Intelligent Solutions in Embedded Systems - (WISES06), Vienna, Austria; in: Fourth Workshop on Intelligent Solutions in Embedded Systems - WISES06, 2006, ISBN: 3-902463-06-6, p. 47 - 54
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C. El Salloum, A. Steininger, P Tummeltshammer: Recovery Mechanisms for Dual Core Architectures
IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT ), Washington DC, USA; in: 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2006, Proceedings, 2006, ISBN: 0-7695-2706-x, p. 380 - 388
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C. El Salloum (invited): Naming and Addressing
ARTIST2 Workshop on Basic Concepts in Mobile Embedded Systems, Wien
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D. De Andrés, S. Blanc, P. Gil, A. Ademaj, K. Steinhammer: BUFI: Fault injector for communication buses
IEEE Conference on Dependable Systems and Networks (DSN), Philadelphia, PA, USA; in: IEEE Conference on Dependable Systems and Networks (DSN06), Proceedings, 2006
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P. Grillinger, A. Ademaj, K. Steinhammer, H. Kopetz: Software Implementation of Time-Triggered Ethernet Controller
IEEE International Workshop on Factory Communication Systems, Torino, Italy; in: Workshop on Factory Communication Systems - WFCS 2006, Proceedings, 2006, ISBN: 1-4244-0379-0, p. 145 - 150
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W. Herzner, B. Huber, A. Balogh, G. Csertan: The DECOS Tool-Chain: Model-Based Development of Distributed Embedded Safety-Critical Real-time Systems
SAFECOMP, Gdansk, Poland; in: DECOS/ERCIM Workshop on Dependable Embedded Systems at SAFECOMP 2006, Proceedings, 2006
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K. Steinhammer, H. Kopetz: Time-Triggered Ethernet
Junior Scientist Conference, Vienna, Austria; in: Junior Scientist Conference - JSC 2006, 2006, ISBN: 3-902463-05-8, p. 73 - 74
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A. Kößler, W. Elmenreich: Automated solution evaluation during a practical examination
Junior Scientist Conference, Vienna, Austria; in: Proceedings of the Junior Scientist Conference 2006, 2006, ISBN: 3-902463-05-8, p. 35 - 36
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C. Paukovits, W. Elmenreich: Meta-Modelling in Tool Support for Time-Triggered Application Development
Junior Scientist Conference, Vienna, Austria; in: Proceedings of the Junior Scientist Conference 2006, 2006, ISBN: 3-902463-05-8, p. 53 - 54
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A. Schörgendorfer, W. Elmenreich: Extended Confidence-Weighted Averaging in Sensor Fusion
Junior Scientist Conference, Vienna, Austria; in: Proceedings of the Junior Scientist Conference 2006, 2006, ISBN: 3-902463-05-8, p. 67 - 68
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S. V. Krywult, W. Elmenreich: A Portable Real-Time Communication System for Embedded Systems with Heterogeneous Hardware
Junior Scientist Conference, Vienna, Austria; in: Proceedings of the Junior Scientist Conference 2006, 2006, ISBN: 3-902463-05-8, p. 41 - 42
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G. Klingler, A. Kößler, W. Elmenreich: The Smart Car - a distributed controlled autonomous robot
Junior Scientist Conference, Vienna, Austria; in: Proceedings of the Junior Scientist Conference 2006, 2006, ISBN: 3-902463-05-8, p. 33 - 34
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R. Pedersen, M. Schoeberl: An Embedded Support Vector Machine
4th Workshop on Intelligent Solutions in Embedded Systems - (WISES06), Vienna, Austria; in: Fourth International Workshop on Intelligent Solutions in Embedded Systems, Proceedings, 2006, ISBN: 3-902463-06-6, p. 79 - 89
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R. Pedersen, M. Schoeberl: Exact Roots for a Real-Time Garbage Collector
Workshop on Java Technologies for Real-time and Embedded Systems (JTRES), Paris, France; in: The 4th Workshop on Java Technologies for Real-time and Embedded Systems (JTRES 2006), Proceedings of, ACM Press (2006), ISBN: 1-59593-544-4, p. 77 - 84
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M. Schoeberl, R. Pedersen: WCET Analysis for a Java Processor
Workshop on Java Technologies for Real-time and Embedded Systems (JTRES), Paris, France; in: The 4th Workshop on Java Technologies for Real-time and Embedded Systems (JTRES 2006), Proceedsings of, ACM Press, 2006, ISBN: 1-59593-544-4, p. 202 - 211
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D. Albeseder, J. Widder: Simulating Distributed Real-Time Systems
Junior Scientist Conference, Wien; in: Junior Scientist Conference 2006, 2006, p. 83 - 84
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T. Handl, A. Steininger: Implementation of an FPGA-Based Hardware Fault Injector
Junior Scientist Conference, Wien; in: Junior Scientist Conference 2006, 2006, p. 23 - 24
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H. Stratil, U. Schmid: Efficient Position-based Communication in Wireless Ad-hoc Networks
Junior Scientist Conference, Wien; in: Junior Scientist Conference 2006, 2006, p. 75 - 76
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P Tummeltshammer, A. Steininger: Time-Multiplexed Multiple Constant Multiplication
Junior Scientist Conference, Wien; in: Junior Scientist Conference 2006, 2006, p. 77 - 78
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M. Delvai, A. Steininger: A Practical Comparison of Logic Design Styles
The 3rd International Conference on Cybernetics and Information Technologies, Systems and Applications, Orlando; in: The 3rd International Conference on Cybernetics and Information Technologies, Systems and Applications - Volume 3, 2006, p. 61 - 66
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M. Delvai, A. Steininger: Asynchronous Logic Design - from Concepts to Implementation
The 3rd International Conference on Cybernetics and Information Technologies, Systems and Applications, Orlando; in: The 3rd International Conference on Cybernetics and Information Technologies, Systems and Applications - Volume 1, 2006, p. 81 - 86
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M. Delvai, A. Steininger: Solving the Fundamental Problem of Digital Design -- A Systematic Review of Design Methods
9th Euromicro Conference on Digital System Design, Dubrovnik; in: 9th Euromicro Conference on Digital System Design - Architectures, Methods and Tools, 2006, p. 131 - 136
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M. Biely, J. Widder: Optimal Message-Driven Implementations of Omega with Mute Processes
8th International Symposium on Stabilization, Safety, and Security of Distributed Systems, Dallas; in: Stabilization, Safety, and Security of Distributed Systems, 2006, p. 110 - 121
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G. Gridling, B. Weiss: A µController Lab for Distance Learning
6th International Workshop on Microelectronics Education, Stockholm; in: EWME 2006 - Proceedings, 2006, p. 129 - 132
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C. Trödhandl, M. Proske, W. Elmenreich: Remote Target Monitoring in Embedded Systems Lab Courses using a Sensor Network
The 32nd Annual Conference of the IEEE Industrial Society, Paris; in: The 32nd Annual Conference of the IEEE Industrial Society - IECON'2006, 2006, p. 5433 - 5438
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W. Elmenreich, C. Trödhandl, B. Weiss: Embedded Systems Home Experimentation
Second IASTED International Conference on Education and Technology, Calgary; in: Proceedings of the Second International Conference on Education and Technology, 2006, p. 11 - 15
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G. Gridling, B. Weiss, W. Elmenreich, C. Trödhandl: Embedded Systems Exams With True/False Questions: A Case Study
Second IASTED International Conference on Education and Technology, Calgary; in: Proceedings of the Second International Conference on Education and Technology, 2006, p. 168 - 172
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E. Armengaud, A. Steininger: Automatic Parameter Identification in FlexRay Based Automotive Communication Networks
IEEE International Conference on Emerging Technologies and Factory Automation, Prag; in: 11th IEEE International Conference on Emerging Technologies and Factory Automation, 2006, p. 897 - 904
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E. Armengaud, A. Steininger: Pushing the Limits of Remote Online Diagnosis in FlexRay Networks
IEEE International Workshop on Factory Communication Systems, Torino; in: 6th IEEE International Workshop on Factory Communication Systems, 2006
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E. Armengaud, A. Steininger: A Remote and Transparent Approach for the Test and Diagnosis of Automotive Networks
Junior Scientist Conference, Wien; in: Junior Scientist Conference 2006, 2006
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E. Armengaud: Low Level Bus Traffic Replay for the Test of Time-Triggered Communication Systems
9th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS06), Prag; in: 9th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, 2006, p. 155 - 156
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E. Armengaud: ExTraCT: A New Approach for the Transparent Test of Time-Triggered Communication Systems
18. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Titisee; in: 18. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2006
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M. Ferringer, G. Fuchs, A. Steininger, G. Kempf: VLSI Implementation of a Fault-Tolerant Distributed Clock Generation
International Symp. on Defect and Fault Tolerance in VLSI-Systems, Arlington; in: The 21st IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems, 2006, p. 563 - 571
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A. Steininger, M Függer, U. Schmid, G. Fuchs: Fault-Tolerant Algorithms on SoCs - A case study
IEEE International Conference on Dependable Systems and Networks, Philadelphia; in: Supplement Proceedings of the 2006 International Conference on Dependable Systems and Networks (DSN), 2006, p. 190 - 191
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M Függer, U. Schmid, G. Fuchs, G. Kempf: Fault-Tolerant Distributed Clock Generation in VLSI Systems-on-Chip
European Dependable Computing Conference, Coimbra; in: EDCC-6, 2006, p. 87 - 96
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G. Fuchs, J. Grahsl, U. Schmid, A. Steininger, G. Kempf: Threshold Modules -- Die Schlüsselelemente zur Verteilten Generierung eines Fehlertoleranten Taktes
Austrochip, Wien; in: Austrochip Mikroelektroniktagung, 2006, p. 149 - 156
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M Függer, T. Handl, A. Steininger, J. Widder, C. Tögel: An Efficient Test for a Transition Signalling based Up-/Down-Counter
Austrochip, Wien; in: Austrochip Mikroelektroniktagung, 2006, p. 55 - 62
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A. Steininger, T. Handl, G. Fuchs, F. Zangerl (invited): Testing the Hardware Implementation of a Distributed Clock Generation Algorithm for SoCs
East-West Design & Test International Workshop (EWDTW'06), Sochi; in: East-West Design & Test International Workshop, 2006, p. 59 - 64
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G. Fuchs, M Függer, A. Steininger, F. Zangerl: Analysis of Constraints in a Fault-Tolerant Distributed Clock Generation Scheme
3rd International Workshop on Dependable Embedded Systems, Leeds; in: WDES 2006 3rd Workshop on Dependable Embedded Systems, 2006, p. 22 - 27
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T. Kottke, A. Steininger: A Reconfigurable Generic Dual-Core Architecture
IEEE International Conference on Dependable Systems and Networks, Philadelphia; in: Proceedings of the 2006 International Conference on Dependable Systems and Networks (DSN), 2006, p. 45 - 54
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A. Steininger, T. Kottke: Ein dynamisch rekonfigurierbarer superskalarer Prozessor mit den Modi Sicherheit und Performanz
18. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Titisee; in: 18. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2006, p. 36 - 40
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W. Herzner, M. Schlager, T. Le Sergent, B. Huber, S. Islam, N. Suri, A. Balogh: From Model-Based Design to Deployment of Integrated, Embedded, Real-Time Systems: The DECOS Tool-Chain
International DECOS Workshop, Vienna, Austria; in: Tagungsband, zur Informationstagung Mikroelektronik, 2006, p. 204 - 213
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B. Rumpler, H. Kopetz: Design Comprehension of Time-Triggered Real-Time Systems
Junior Scientist Conference, Vienna, Austria; in: Proceedings of the Junior Scientist Conference 2006 (JSC'06), 2006, p. 63 - 64
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B. Rumpler: Complexity Management for Composable Real-Time Systems
IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Gyeongju, Korea; in: Proceedings of the 9th IEEE International Symposium on Object and component-oriented Real-time distributed Computing (ISORC06), IEEE, 2006, p. 365 - 373
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B. Rumpler, W. Elmenreich: Considerations on the Complexity of Embedded Real-Time System Design Tasks
IEEE International Conference on Computational Cybernetics 2006 (ICCC'06), Talinn, Estonia; in: IEEE International Conference on Computational Cybernetics 2006 (ICCC'06), Proceedings of the, 2006, p. 55 - 60
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P. Puschner (invited): Architecture Support for Temporal Predictability and Composability in Real-Time Computing
4th International Conference on Information and 4th Irish Conference on the Mathematical Foundations of Computer Science and Information Technology, Cork, Ireland; in: 4th International Conference on Information and 4th Irish Conference on the Mathematical Foundations of Computer Science and Information Technology, Proceedings, 2006, p. #1
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S. Kandl, R. Kirner: Systematic Automated Testing of Safety-Critical Applications in the Automotive Domain (Best Poster Award)
Junior Scientist Conference, Wien; in: Proceedings of the Junior Scientist Conference 2006, 2006
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A. Hanzlik, A. Ademaj: A Composable Algorithm for Clock Synchronization in Multi-Cluster Real-Time Systems
4th Workshop on Intelligent Solutions in Embedded Systems - (WISES06), Vienna, Austria; in: 4th Workshop on Intelligent Solutions in Embedded Systems - (WISES06), Proceedings of the, 2006
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R. Obermaisser, B. Huber: Model-Based Design of the Communication System in an Integrated Architecture
International Conference on Parallel and and Distributed Computing and Systems (PDCS), Dallas, Texas, USA; in: International Conference on Parallel and Distributed Computing and Systems (PDCS 2006), Proceedings of the, 2006
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M. Delvai, A. Steininger: Teaching Hardware Software Codesign to Software Engineers
1st International Workshop on Reconfigurable Computing Education, Karlsruhe; in: International Workshop on Reconfigurable Computing Education, 2006
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G. Klingler, A. Kößler: Das "Smart Car" - ein verteilt kontrollierter, autonomer Roboter
more@Informatics 2006, Wien
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C. El Salloum, R. Obermaisser, B. Huber, H. Kopetz, N. Suri: Supporting Heterogeneous Applications in the DECOS Integrated Architecture
International DECOS Workshop, Vienna, Austria; in: International DECOS Workshop, 2006
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P. Peti, H. Paulitsch, R. Obermaisser: Investigating Connector Faults in the Time-Triggered Architecture
ETFA, Prague, Czech Republic; in: 11th IEEE International Conference on Emerging Technologies and Factory Automation , Proceedings, 2006
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S. Kandl, R. Kirner, G. Fraser: Verification of Platform-Independent and Platform-Specific Semantics of Dependable Embedded Systems
3rd International Workshop on Dependable Embedded Systems, Leeds, UK; in: 3rd International Workshop on Dependable Embedded Systems, Proceedings, 2006, p. 17 - 21
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R. Kirner, M. Grössing, P. Puschner: Comparing WCET and Resource Demands of Trigonometric Functions Implemented as Iterative Calculations vs. Table-Lookup
Euromicro International Workshop on WCET Analysis, Dresden, Germany; in: 6th Euromicro International Workshop on Worst-Case Execution-Time Analysis (WCET), Proceedings of the, 2006, p. 11 - 16
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A. Ademaj, H. Kopetz, P. Grillinger, K. Steinhammer, M. Prammer: Integration of Predictable and Flexible In-Vehicle Communication using Time-Triggered Ethernet
SAE World Congress, Detroit, USA; in: SAE Worl Congress, SAE International, 2006, ISBN: 0-7680-1763-7
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P. Peti, R. Obermaisser: A Diagnostic Framework for Integrated Time-Triggered Architectures
IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Gyeongju, Korea; in: 9th IEEE International Symposium on Object and component-oriented Real-time distributed Computing, Proceedings of the, IEEE, 2006, ISBN: 0-7695-2561-x
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P. Puschner, R. Kirner (invited): From Time-Triggered to Time-Deterministic Real-Time Systems
IFIP Working Conference on Distributed and Parallel Embedded Systems, Braga, Portugal; in: 5th IFIP Working Conference on Distributed and Parallel Embedded Systems, Proceedings, Springer, 2006, ISBN: 0-387-39361-7, p. 115 - 124
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R. Kirner, P. Puschner, I. Wenzel, B. Rieder: Portable Data Exchange for Remote-Testing Frameworks
IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Gyeongju, Korea; in: Proceedings of the Ninth IEEE International Symposium on Object and Component-Oriented Real-Time Distributed Computing, IEEE, 2006, ISBN: 0-7695-2561-x
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S. Kandl, R. Kirner, P. Puschner: Development of a Framework for Automated Systematic Testing of Safety-Critical Embedded Systems
4th Workshop on Intelligent Solutions in Embedded Systems - (WISES06), Vienna, Austria; in: 4th Workshop on Intelligent Solutions in Embedded Systems (WISES'06), Proceedings of the, 2006
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A. Ademaj, K. Steinhammer, P. Grillinger, H. Kopetz, A. Hanzlik: Fault-Tolerant Time-Triggered Ethernet Configuration with Star Topology
19th International Conference on Architecture of Computing systems (ARCS), Frankfurt/Main, Germany; in: 19th International Conference on Architecture of Computing systems (ARCS'06), Proceedings of the, Springer-Verlag, 2006, ISBN: 3-540-32765-7
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B. Huber, R. Obermaisser, P. Peti: MDA-Based Development in the DECOS Integrated Architecture - Modeling the Hardware Platform
IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Gyeongju, Korea; in: Proceedings of the 9th IEEE International Symposium on Object and component-oriented Real-time distributed Computing (ISORC'06), IEEE, 2006, ISBN: 0-7695-2561-x
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W. Steiner, H. Kopetz: The Startup Problem in Fault-Tolerant Time-Triggered Communication
IEEE International Conference on Dependable Systems and Networks, Philadelphia, PA, USA; in: International Conference on Dependable Systems and Networks 2006, Proceedings of the, 2006, ISBN: 0-7695-2607-1, p. 35 - 44
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H. Kopetz (invited): On the Fault Hypothesis for a Safety-Critical Real-Time System
Future Generation Software Architectures in the Automotive Domain, San Diego, USA; in: On the Fault Hypothesis for a Safety-Critical Real-Time System, H. Kopetz (ed.); 2004
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M. Schoeberl: Real-Time Garbage Collection for Java
IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Gyeongju, Korea; in: Proceedings of the 9th IEEE International Symposium on Object and Component-Oriented Real-Time Distributed Computing (ISORC 2006), IEEE, 2006, ISBN: 0-7695-2561-x, p. 424 - 432
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K. Steinhammer, P. Grillinger, A. Ademaj, H. Kopetz: A Time-Triggered Ethernet (TTE) Switch
Design, Automation and Test in Europe Conference (DATE), Munich, Germany; in: Proceedings of the Design, Automation and Test in Europe, 2006, ISBN: 3-9810801-0-6; 6 pages
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M. Schoeberl: A Time Predictable Java Processor
Design, Automation and Test in Europe Conference (DATE), Munich, Germany; in: Proceedings of the Design, Automation and Test in Europe Conference (DATE 2006), 2006, ISBN: 3-9810801-0-6; 6 pages
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M. Delvai, A. Steininger: ASPEAR - An Asynchronous 16 Bit RISC Processor Core
Siemens PSE Technology Day, Wien
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J.-F. Hermant, J. Widder: Implementing Reliable Distributed Real Time Systems with the Theta Model
International Conference on Principles of Distributed Systems, Pisa; in: 9th International Conference on Principles of Distributed Systems, 2005, p. 259 - 271
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E. Armengaud, A. Steininger, M. Horauer: A Method for Bit Level Test and Diagnosis of Communication Services
IEEE International Workshop on Desgin & Diagnostic of Electronic Circuits and Systems, Sopron; in: Proceedings of IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS) 2005, 2005, p. 69 - 74
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E. Armengaud, F Rothensteiner, A. Steininger, M. Horauer: A Flexible Hardware Architecture for Fast Access on Large Non-Volatile Memories
IEEE International Workshop on Desgin & Diagnostic of Electronic Circuits and Systems, Sopron; in: Proceedings of IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS) 2005, 2005, p. 113 - 120
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V. Legourski, C. Trödhandl, B. Weiss: A System for Automatic Testing of Embedded Software in Undergraduate Study Exercises
Workshop on Embedded Systems Education, Jersey City; in: Proceedings Workshop on Embedded Systems Education (WESE'05), 2005, p. 44 - 51
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G. Le Lann, U. Schmid: Proof-Based Systems Engineering in ASSERT
Data Systems in Aerospace, Edinburgh; in: Proof-Based Systems Engineering in ASSERT, 2005
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E. Armengaud, A. Steininger, M. Horauer: An Efficient Test and Diagnosis Environment for Communication Controllers
Austrochip, Wien; in: Austrochip 2005, ???, 2005
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M. Delvai, G. Fuchs, T. Handl, W. Huber, A. Steininger: Design of an Asynchronous Microprocessor with Four-State Logic
Austrochip, Wien; in: Austrochip 2005, 2005, p. 105 - 112
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T. Kottke, A. Steininger: Designoptimierung eines Prozessors mit Eigenfehlererkennung
17. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen;, Inssbruck; in: 16. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen;, 2005, p. 55 - 59
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D. Albeseder: Evaluation of Message Delay Correlation in Distributed Systems
3rd Workshop on Intelligent Solutions in Embedded Systems (WISES'05), Hamburg, Deutschland; in: Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems, 2005, p. 139 - 150
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H. Stratil: Voronoi supported communication in Wireless ad-hoc Networks
Second International Symposium on Voronoi Diagrams in Science and Engineering, Seoul, Korea; in: The 2nd International Symposium on Voronoi Diagrams in Science and Engineering, 2005, p. 105 - 116
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H. Stratil: Fault Tolerant Topology Control with unreliable Failure Detectors
IASTED International Conference on Parallel and Distributed Computing Systems, Phoenix, Arizona; in: Proceedings of the 17th IASTED International Conference on Parallel and Distributed Computing and Systems, 2005, ISBN: 0-88986-525-6, p. 767 - 772
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H. Stratil: Distributed Construction of an Underlay in Wireless Networks
European Workshop on Wireless Sensor Networks, Istanbul, Türkei; in: Proceedings of the Second European Workshop on Wireless Sensor Networks, 2005, p. 176 - 187
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B. Weiss, G. Gridling, M. Proske: A Case Study in Efficient Microcontroller Education
Workshop on Embedded Systems Education, Jersey City, New Jersey; in: Proceedings Workshop on Embedded Systems Education WESE 2005, 2005, p. 36 - 43
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B. Thallner, H. Moser: Topology Control for Fault-Tolerant Communication in Highly Dynamic Wireless Networks
Workshop on Intelligent Solutions in Embedded Systems, Hamburg, Deutschland; in: Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems, 2005, p. 89 - 100
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M. Biely, G. Le Lann, U. Schmid: Proof-Based System Engineering Using a Virtual System Model
International Service Availability Symposium, Berlin, Deutschland; in: Service Availability, 2005, p. 164 - 179
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M. Hutle, J. Widder: Brief Announcement: On the Possibility and the Impossibility of Message-Driven Self-Stabilizing Failure Detection
ACM Symposium on Principles of Distributed Computing, Las Vegas, Nevada; in: Proceedings of the 24th ACM Symposium on Principles of Distributed Computing, 2005, p. 208
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J. Widder, G. Le Lann, U. Schmid: Failure Detection with Booting in Partially Synchronous Systems
European Dependable Computing Conference, Budapest, Ungarn; in: Dependable Computing Conference - EDCC5, 2005, p. 20 - 37
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M. Hutle, J. Widder: On the Possibility and the Impossibility of Message-Driven Self-Stabilizing Failure Detection
Seventh International Symposium on Self Stabilizing Systems (SSS 2005), Barcelona, Spanien; in: Self Stabilizing Systems, 2005, p. 153 - 170
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M. Hutle, J. Widder: Self-Stabilizing Failure Detector Algorithms
IASTED International Conference on Parallel and Distributed Computing Systems, Innsbruck, Austria; in: IASTED International Conference on Parallel and Distributed Computing and Networks, 2005, ISBN: 0-88986-468-3, p. 485 - 490
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P. Puschner, R. Kirner: Timing Analysis for Embedded Systems and Time-Predictable Computing
Siemens PSE Technology Day, Vienna, Austria
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K. Kim, W. Recker, W. T. Tsai, H. Kopetz, P. Puschner: DECOS-TADE Collaboration
Workshop on the Collaboration between FP6/ISTand NSF/ITR Projects, Ljubljana, Slovenia; in: IST-NSF Workshop on Transatlantic Research Agenda on Future Challenges in Embedded Systems Design, Information Society Technologies/National Science Foundation, 2005; 7 pages
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W. Elmenreich, G. Karsai: Transatlantic Collaboration on Model-Integrated Computing for Dependable Embedded Components and Systems
Workshop on the Collaboration between FP6/ISTand NSF/ITR Projects, Ljubljana, Slovenia; in: Workshop on the Collaboration between FP6/ISTand NSF/ITR Projects, Information Society Technologies/National Science Foundation, 2005; 5 pages
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W. Elmenreich, G. Klingler, A. Kößler, S. V. Krywult: Time-Triggered Smart Transducer Networks
Siemens PSE Technology Day, Vienna, Austria
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C. Paukovits, W. Elmenreich: Model-Integrated Tool Support for Real-Time Embedded Systems
Siemens PSE Technology Day, Vienna, Austria
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W. Elmenreich, C. Paukovits, S. Pitzek: Automatic Generation of Schedules for Time-Triggered Embedded Transducer Networks
ETFA, Catania, Italy; in: Proceedings of the 10th IEEE International Conference on Emerging Technologies and Factory Automation, W. Elmenreich (ed.); IEEE, II (2005), ISBN: 0-7803-9402-x, p. 535 - 541
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W. Elmenreich, S. V. Krywult: A Comparison of Fieldbus Protocols: LIN 1.3, LIN 2.0, and TTP/A
ETFA, Catania, Italy; in: Proceedings of the 10th IEEE Internationla Conference on Emerging Technologies and Factory Automation, S. V. Krywult (ed.); IEEE, I (2005), ISBN: 0-7803-9402-x, p. 747 - 753
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S. Pitzek, W. Elmenreich: Plug-and-Play: Bridging the Semantic Gap Between Application and Transducers
ETFA, Catania, Italy; in: Proceedings of the 10th IEEE Internationla Conference on Emerging Technologies and Factory Automation, IEEE, I (2005), ISBN: 0-7803-9402-x, p. 799 - 806
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P. Puschner: Experiments with WCET-Oriented Programming and the Single-Path Architecture RR Number
IEEE International Workshop on Object-Oriented Real-Time Dependable Systems (WORDS), Sedona, Arizona; in: Proceedings of the 10th IEEE International Workshop on Object-Oriented Real-Time Dependable Systems, 2005, 2005, ISBN: 0-7695-2347-1, p. 205 - 210
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F. Gruian, P. Andersson, K. Kuchcinsky, M. Schoeberl: Automatic Generation of Application-Specific Systems Based on a Micro-programmed Java Core
ACM Symposium on Applied Computing, Santa Fe, New Mexico; in: Proceedings of the 2005 ACM symposium on Applied computing, ACM Press, 2005, ISBN: 1-58113-964-0, p. 879 - 884
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I. Wenzel, R. Kirner, M. Schlager, B. Rieder, B. Huber: Impact of Dependable Software Development
VAST2000 Euroconference, Belgrad, Serbia and Montenegro; in: EUROCON 2005 - The International Conference on "Computer as a Tool", IEEE, 2005, p. 575 - 578
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I. Wenzel, R. Kirner, P. Puschner, B. Rieder: Principles of Timing Anomalies in Superscalar Processors
International Conference on Quality Software (QSIC), Melbourne, Australia; in: Proceedings of the Fifth International Conference on Quality Software, PR2472 (2005), ISBN: 0-7695-2472-9, p. 295 - 303
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E. Armengaud, A. Steininger, M. Horauer: Efficient Stimulus Genereation for Remote Testing of Distributed Systems - The Flexray Example
ETFA, Catania, Italy; in: Proceedings of the 10th IEEE Internationla Conference on Emerging Technologies and Factory Automation, IEEE, I (2005), p. 763 - 770
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R. Obermaisser, P. Peti: Specification and Execution of Gateways in Integrated Architectures
ETFA, Catania, Italy; in: Proceedings of the 10th IEEE Internationla Conference on Emerging Technologies and Factory Automation, IEEE, II (2005), ISBN: 0-7803-9402-x, p. 689 - 698
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R. Obermaisser, P. Peti, H. Kopetz: Virtual Networks in an Integrated Time-Triggered Architecture
IEEE International Workshop on Object-Oriented Real-Time Dependable Systems (WORDS), Sedona, Arizona; in: Proceedings of the 10th IEEE International Workshop on Object-Oriented Real-Time Dependable Systems, 2005, 2005
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R. Obermaisser, E. Henrich, K. Kim, H. Kopetz, M. H. Kim: Integration of two Complementary Time-Triggered Technologies: TMO and TTP
International Embedded Systems Symposium, Manaus, Brazil; in: Proceedings of the International Embedded Systems Symposium 2005, Springer, 2005, ISBN: 0-387-27557-6, p. 1 - 12
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M. Schoeberl: Evaluation of a Java Processor
Austrochip, Vienna, Austria; in: Proceedings, Austrochip Mikroelektronik Tagung 2005, 2005, ISBN: 3-901578-13-7
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H. Kopetz, A. Ademaj, P. Grillinger, K. Steinhammer: The Time-Triggered Ethernet (TTE) Design
IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Seattle, Washington; in: Proceedings of the 8th IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), IEEE Computer Society, 2005, ISBN: 0-7695-2356-0, p. 22 - 33
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R. Kirner, P. Puschner: Classification of WCET Analysis Techniques
IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Seattle, Washington; in: Proceedings of the 8th IEEE International Symposium on Object-Oriented Real-time distributed Computing (ISORC'05), IEEE Computer Society, 2005, ISBN: 0-7695-2356-0, p. 190 - 199
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M. Schöberl: Design and Implementation of an Efficient Stack Machine
International Parallel and Distributed Processing Symposium (IPDPS), Denver, Colorado; in: Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International (IPDPS), 2005, ISBN: 0-7695-2312-9, p. 159
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B. Huber, P. Peti, R. Obermaisser, C. El Salloum: Using RTAI/LXRT for Partitioning in a Prototype Implementation of the DECOS Architecture
3rd Workshop on Intelligent Solutions in Embedded Systems (WISES'05), Hamburg, Germany; in: Proceedings of the 3rd Workshop on Intelligent Solutions in Embedded Systems (WISES'05),, 2005, ISBN: 3-902463-03-1, p. 3 - 16
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P. Peti, R. Obermaisser, H. Paulitsch: The Diagnostic Architecture of the PEGASUS Project Car
3rd Workshop on Intelligent Solutions in Embedded Systems (WISES'05), Hamburg, Germany; in: Proceedings of the 3rd Workshop on Intelligent Solutions in Embedded Systems (WISES'05), IEEE Catalog Number 05EX1101 (2005), ISBN: 3-902463-03-1, p. 163 - 174
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P. Peti, R. Obermaisser, F. Tagliabo, A. Marino, S. Cerchio: An Integrated Architecture for Future Car Generations
IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Seattle, Washington; in: Proceedings of the 8th IEEE International Symposium on Object-Oriented Real-Time Distributed Computing, 2005, ISBN: 0-7695-2356-0, p. 2 - 13
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P. Peti, R. Obermaisser, A. Ademaj, H. Kopetz: A Maintenance-Oriented Fault Model for the DECOS Integrated Diagnostic Architecture
Workshop on Parallel and Distributed Real-Time Systems (WPDRTS), Denver, Colorado; in: Proceedings of the 13th Workshop on Parallel and Distributed Real-Time Systems 2005 (WPDRTS) Author(s), 2005, ISBN: 0-7695-2312-9
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R. Obermaisser, P. Peti, H. Kopetz: Virtual Gateways in the DECOS Integrated Architecture
Workshop on Parallel and Distributed Real-Time Systems (WPDRTS), Denver, Colorado; in: Proceedings of the 13th Workshop on Parallel and Distributed Real-Time Systems 2005 (WPDRTS), 2005, ISBN: 0-7695-2312-9
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P. Peti, R. Obermaisser, H. Kopetz: Out-of-Norm Assertions
IEEE Real-Time and Embedded Technology and Applications Symposium, San Francisco, California; in: Proceedings of the elventh IEEE Real-Time and Embedded Technology and Applications Symposium, IEEE Computer Society, 2005, ISBN: 0-7695-2302-1, p. 280 - 291
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I. Wenzel, R. Kirner, B. Rieder, P. Puschner: Measurement-Based Worst-Case Execution Time Analysis
IEEE Workshop on Software Technologies for Future Embedded Systems, Seattle, Washington; in: Proceedings of the third Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS), IEEE, 2005, ISBN: 0-7695-2357-9, p. 7 - 10
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I. Wenzel, B. Rieder, R. Kirner, P. Puschner: Automatic Timing Model Generation by CFG Partitioning and Model Checking
Conference on Design, Automation and Test in Europe, Munich, Germany; in: Proceedings of the Conference on Design, Automation and Test in Europe (DATE 2005), 2005, ISBN: 0-7695-2288-2, p. 606 - 611
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J. Puchinger, G. Raidl, G. Koller: Solving a real-world glass cutting problem
EVOCOP: 4th European Conference on Evolutionary Computation in Combinatorial Optimization, Coimbra, Portugal
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J. Widder (invited): Why, Where and How to Use the Theta-Model
Seminaire Reflecs in INRIA Rocquencourt, Frankreich, INRIA Rocquencourt, Frankreich
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J. Widder: VLSI Design and the Theta-Model (Kurzvorstellungen aktueller Forschung)
Diskussionskreis Fehlertoleranz, Berlin
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U. Schmid: The Theta-Model
Diskussionskreis Fehlertoleranz, Berlin
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J. Widder (invited): The Theta-Model, and how to Boot Clock Synchronization in it
Seminaire Reflecs in INRIA Rocquencourt, Frankreich, INRIA Rocquencourt, Frankreich
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R. Pallierer, M. Horauer, A. Steininger: Monitoring and Fault Injection of X-by-Wire Communication Networks
Entwicklerforum Design & Elektronik: Drahtlose und drahtgebundene Netzwerke, Wien; in: Entwicklerforum Design & Elektronik: Drahtlose und drahtgebundene Netzwerke, 2004
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M. Horauer, F Rothensteiner, M Zauner, E. Armengaud, A. Steininger, H. Friedl, R. Pallierer: An FPGA based SoC Design for Testing Embedded Automotive Communication Systems employing the FlexRay Protocol
Austrochip, Wien; in: Austrochip 2004, TU-Wien, 2004, p. 119 - 123
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E. Armengaud, A. Steininger, M. Horauer, R. Pallierer: Design Trade-offs for Systematic Tests of Embedded Communication Systems
IEEE International Conference on Dependable Systems and Networks, Florence, Italy; in: International Conference on Dependable Systems and Networks (DSN 2004), 2004, p. 118 - 119
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B. Thallner: Fault Tolerant Communication Topologies for Wireless Ad Hoc Networks
IEEE International Conference on Dependable Systems and Networks, Florence, Italy; in: Proceedings 1st Workshop on Dependability Issues in Wireless Ad Hoc Networks and Sensor Networks (DIWANS'04), 2004, p. 261 - 266
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C. Fetzer, U. Schmid: Brief Announcement: On the Possibility of Consensus in Asynchronous Systems with Finite Average Response Times
23th ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing (PODC), St. John´s , Newfoundland, Canada; in: 23th ACM SIGACT-SIGOPS Symposium on PRINCIPLES of DISTRIBUTED commuting (PODC), 2004, p. 402
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P Tummeltshammer, J.C Hoe, M Püschel: Multiple Constant Multiplication By Time-Multiplexed Mapping of Addition Chains
DAC 04, San Diego, California, USA; in: DAC 04, 2004, p. 826 - 829
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H. Stratil: An efficient implementation of the greedy forwarding strategy
34. Jahrestagung der Gesellschaft für Informatik (GI), Ulm; in: GI-Edition Informatik 2004- Informatik verbindet, Köllen Druck+Verlag, Band 2, Ulm (2004), ISSN: 1617-5468, p. 365 - 369
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T. Kottke, A. Steininger: A Dual Core Architecture with Error Containment
East-West Design & Test International Workshop(EWDTW´04), Yalta-Alushta, Crimea, Ukraine; in: East-West Design & Test International Workshop, 2004, ISBN: 966-659-088-3, p. 102 - 108
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A. Steininger, T. Kottke: Concurrent Checking eines Adressdecoders
16. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Dresden, Germany; in: GMM/ITG Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2004, p. 25 - 29
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T. Kottke, A. Steininger: A Generic Dual-Core Architecture
7th IEEE International Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2004), Stara Lesna, Slovakia; in: 7th IEEE International Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2004), 2004, ISBN: 80-969117-9-1, p. 159 - 166
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E. Armengaud, A. Steininger, M. Horauer, R. Pallierer, H. Friedl: A Monitoring Concept for an Automotive Distributed Network - The FlexRay Example
7th IEEE International Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2004), Stara Lesna, Slovakia; in: Proceedings of the 7th Workshop on Design and Diognostics of Electronic Circuits and Systems, 2004, ISBN: 80-969117-9-1, p. 173 - 178
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E. Armengaud, A. Steininger, M. Horauer, R. Pallierer: A Layer Model for the Systematic Test of Time-Triggered Automotive Communication Systems
IEEE International Workshop on Factory Communication Systems, Vienna,Austria; in: IEEE Workshop on Factory Communication Systems (WFCS 04), IEEE Catalog Number 04TH8777 (2004), ISBN: 0-7803-8734-1, p. 275 - 283
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M. Hutle: On omega in sparse networks (Fast Abstract)
20th IEEE International Conference on Software Maintenance (ICSM'04), Papeete,Tahiti,French Polynesia; in: Proceedings of the 10th IEEE International Symposium Pacific Rim Dependable Computing, LAAS-CNRS, 2004, p. 37 - 38
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M. Hutle: An efficient failure detector for sparsely connected networks
22nd IASTED International Multi-Conference on Applied Informatics, Innsbruck, Austria; in: Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks, Acta Press, 2004, ISSN: 1027-2666, p. 369 - 374
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A. Steininger: Embedded Systems im Auto - Ein Vorbild für die Bahn?
Tagung, TU-Wien, Prechtlsaal; in: Intelligenz im Schienenverkehr: Sicherheitsstandarts und effiziente Kapatzitätsnutzung, 2004, p. #
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A. Steininger, T. Kottke: A Fail-Silent Memory for Automotive Applications
European Test Symposium, Ajaccio,Corsica,France; in: 9th European Test Symposium, 2004, p. 253 - 258
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H. Kopetz: Composable Embedded Systems
IEEE International Conference on Computational Cybernetics, Vienna, Autria; in: Proceedings of the IEEE International Conference on Computational Cybernetics (ICCC 2004), IEEE, 2004, ISBN: 3-902463-01-5, p. 3
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H. Kopetz (invited): Composition of component services
IEEE International Workshop on Object-Oriented Real-Time Dependable Systems, Vienna, Austria; in: Proceedings of the Seventh IEEE International Symposium on Object-Oriented Real-Time Distributed Computing, 2004. (ISORC), IEEE, 2004, ISBN: 0-7695-2124-x, p. 3
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H. Kopetz (invited): An integrated architecture for dependable embedded systems
IEEE Symposium on Reliable Distributed Systems, Florianopolis, Brazil; in: Proceedings of the 23rd IEEE International Symposium on Reliable Distributed Systems, 2004., IEEE, 2004, p. 160 - 161
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M. Jankela, W. Puffitsch, W. Huber: Towards a Rapid Prototyping Framework for Architecture Exploration in Embedded Systems
Workshop on Intelligent Solutions in Embedded Systems, Graz, Austria; in: Proceedings of the Second Workshop on Intelligent Solutions im Embedded Systems, 2004, ISBN: 3902463007, p. 117 - 127
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I. Smaili: Using Triggers to Find Significant Events during Monitoring of Real-Time Systems
Workshop on Intelligent Solutions in Embedded Systems, Graz; in: Proceedings of the Second Workshop on Intelligent Solutions in Embedded Systems - WISES 2004, 2004, ISBN: 3902463007, p. 37 - 47
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S. Pitzek, P. Puschner: Function Test Environment for Embedded Driver Components
IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Vienna, Austria; in: Proceedings of the IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC 2004), IEEE, 2004, ISBN: 0-7695-2124-x, p. 237 - 244
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W. Steiner, J. Rushby, M. Sorea, G. Pfeifer: Model Checking a Fault-Tolerant Startup Algorithm: From Design Exploration To Exhaustive Fault Simulation
IEEE International Conference on Dependable Systems and Networks, Florence, Italy; in: Proceedings of the International Conference on Dependable Systems and Networks (DSN 2004), IEEE, 2004, ISBN: 0-7695-2052-9
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I. Smaili, P. Puschner: Monitoring Data Types in Distributed Real -Time Systems
IEEE International Conference on Computational Cybernetics, Vienna, Austria; in: Proceedings of the IEEE International Conference on Computational Cybernetics (ICCC 2004), 2004, ISBN: 3-902463-01-5, p. 163 - 168
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H. Kopetz, A. Ademaj, A. Hanzlik: Integration of Internal and External Clock Synchronization by the Combination of Clock-State and Clock-Rate Correction in Fault-Tolerant Distributed Systems
IEEE Real-Time Systems Symposium, Lisbon, Portugal; in: Proceedings of the 25th IEEE International Real-Time Systems Symposium, IEEE, 2004, ISBN: 0-7695-2247-5
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R. Kirner, P. Puschner, I. Wenzel: Measurement-Based Worst-Case Execution Time Analysis using Automatic Test-Data Generation
Euromicro International Workshop on WCET Analysis, Catania, Italy; in: Proceedings of the, 2004, ISSN: 1166-8687, p. 1 - 4
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T. Losert, W. Elmenreich, M. Schlager: Semi-Automatic Compensation of the Propagation-Delay in Fault-Tolerant Systems
IASTED International Conference on Communications, Internet, and Information Technology (CIIT 2004), US Virgin Islands; in: Proceedings of the Third International Conference on Communications, Internet, and Information Technology (CIIT 2004), ACTA Press, 2004, ISBN: 0-88986-445-4, p. 455 - 460
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K. Hendling, T. Losert, W. Huber, M. Jandl: Interference Minimizing Bandwidth Guaranteed On-Line Routing Algorithm for Traffic Engineering
IEEE International Conference on Networks (2004, 12th ICON), Singapur; in: Proceedings of the IEEE International Conference on Networks (2004, 12th ICON), IEEE, Volume 2 (2004), ISBN: 0-7803-8783-x, p. 497 - 503
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R. Gallo, M. Delvai, W. Elmenreich, A. Steininger: Revision and Verification of an Enhanced UART
IEEE International Workshop on Factory Communication Systems, Vienna, Austria; in: Proceedings of the 2004 IEEE International Workshop on Factory Communication Systems, IEEE, 2004, ISBN: 0-7803-8734-1, p. 315 - 318
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B. Huber, W. Elmenreich: Wireless Time-Triggered Real-Time Communication
Workshop on Intelligent Solutions in Embedded Systems, Graz, Österreich; in: Proceedings of the 2nd Workshop on Intelligent Solutions in Embedded Systems, 2004, ISBN: 3-902463-00-7, p. 169 - 182
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W. Elmenreich, M. Schlager: Simulation-based Development of Embedded Sensor Fusion Applications
IEEE International Conference on Computational Cybernetics, Wien; in: Proceedings of the 2nd IEEE International Conference on Computational Cybernetics, 2004, ISBN: 3-902463-01-5, p. 147 - 153
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W. Elmenreich, S. Pitzek, M. Schlager: Modeling Distributed Embedded Applications on an Interface File System
IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Vienna, Austria; in: Proceedings of the Seventh IEEE International Symposium on Object-Oriented Real-Time Distributed Computing, IEEE Computer Society Press, 2004, ISBN: 0-7695-2124-x, p. 175 - 182
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B. Rahbaran, M Függer, A. Steininger: Embedded Real-Time-Tracer --An Approach with IDE
Workshop on Intelligent Solutions in Embedded Systems, Austria, Graz; in: Proceedings of the Second Workshop on Intelligent Solutions in Embedded Systems, 2004, ISBN: 3-902463-00-7, p. 25 - 35
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B. Rahbaran, A. Steininger: Real-time Fault Injection with Signal-Flip model by FIDYCO
IEEE International Conference on Dependable Systems and Networks, Florence, Italy; in: DSN 2004 Supplement, IEEE Computer Society, Supplemental (2004), p. 70 - 71
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P. Puschner: The Single-Path Approach Towards WCET-Analysable Software
IEEE International Conference on Industrial Technology, Maribor, Slovenia; in: Proceedings of IEEE International Conference on Industrial Technology, 2003, p. 699 - 704
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B. Rahbaran, A. Steininger, T. Handl: Built-in Fault Injection in Hardware-- The FIDYCO Example
IEEE International Workshop on Electronic Design, Test and Applications, Perth, Australia; in: Second IEEE International Workshop on Electronic Design, Test and Applications, B. Rahbaran, A. Steininger (ed.); IEEE Computer Society Press, Delta 2004, Perth Australia (2004), ISBN: 0-7695-2081-2, p. 327 - 332
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P. Puschner: Algorithms for Dependable Hard Real-Time Systems
IEEE International Workshop on Object-Oriented Real-Time Dependable Systems, Guadalajara, Mexico; in: Proceedings of the 8th IEEE International Workshop on Object-Oriented Real-Time Dependable Systems, 2003, p. 26 - 31
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W. Steiner, M. Paulitsch, H. Kopetz: Multiple Failure Correction in the Time-Triggered Architecture
IEEE International Workshop on Object-Oriented Real-Time Dependable Systems, Capri, Italy; in: Proceedings of the 9th IEEE International Conference on Object-oriented Real-time Dependable Systems (WDS 2003f), 2003, p. 1 - 8
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J. Fauster, R. Kirner, P. Puschner: Intelligent Editor for Writing Worst-Case-Execution-Time-Oriented Programs
International Conference on Embedded Software, Philadelphia, PA, USA; in: Proceedings of the 3rd International Conference on Embedded Software (EMSOFT 2003), 2003, p. 190 - 205
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J. Gustafsson, B. Lisper, R. Kirner, P. Puschner: Input-Dependency Analysis for Hard Real-Time Software
IEEE International Workshop on Object-Oriented Real-Time Dependable Systems, Capri, Italy; in: Proceedings of the 9th IEEE International Workshop on Object-oriented Real-time Dependable Systems (WORDS'03F), 2003, p. 1 - 8
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H. Kopetz, N. Suri: Compositional Design of RT Systems: A Conceptual Basis for Specification of Linking Interfaces
6th IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC'03), Hokkaido, Japan; in: Proceedings of the 6th IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC'03), 2003, p. 1 - 10
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J. Widder: Booting clock synchronization in partially synchronous systems.
International Conference on Distributed Computing Systems, Sorrento, Italy; in: Proceedings of the 17th International Symposium on Distributed Computing, 2003, p. 121 - 135
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U. Schmid, C. Fetzer: Randomized asynchronous consensus with imperfect communications.
IEEE Symposium on Reliable Distributed Systems, Florence, Italy; in: Proc. 22nd Symposium on Reliable Distributed Systems, 2003, p. 361 - 370
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M. Horauer, U. Schmid, K. Schossmaier, R. Höller, N. Kerö: PSynUTC --- evaluation of a high precision time synchronization prototype system for Ethernet LANs.
IEEE Precise Time and Time Interval Systems and Application Meeting, Reston, Virginia, USA; in: Proceedings of the 34th IEEE Precise Time and Time Interval Systems and Application Meeting (PTTI'02), 2003, p. 263 - 278
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M. Biely: An optimal Byzantine agreement algorithm with arbitrary node and link failures.
IASTED International Conference on Parallel and Distributed Computing Systems, Marina Del Rey, California, USA; in: Proc. 15th Annual IASTED International Conference on Parallel, 2003, p. 146 - 151
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A. Ademaj, G. Bauer, H. Sivencrona, J. Torin: Evaluation of Fault Handling of the Time-Triggered Architecture with Bus and Star Topology
IEEE International Conference on Dependable Systems and Networks, San Francisco, USA; in: Proceedings of the IEEE International Conference on Dependable Systems and Networks, 2003, p. 123 - 132
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M. Delvai, M. Jankela, A. Steininger: Towards Virtual Prototyping of Embedded Computer Systems
The 7th World Multiconference on Systemics, Cybernetics and Informatics, Orlando, Florida; in: Proceedings, Volume I, Information Systems, Technologies and Applications, 2003, p. 70 - 75
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W. Elmenreich, R. Obermaisser, P. Peti: A Model for Reactive Systems Supporting Varying Degrees of Synchrony
IEEE International Conference on Computational Cybernetics, Siofok, Hungary; in: Proceedings of IEEE International Conference on Computational Cybernetics, 2003, ISBN: 963-7154-18-3, p. 275 - 280
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W. Elmenreich: Fault-Tolerant Certainty Grid
ICAR International Conference on Advanced Robotics, Coimbra, Portugal; in: Proceedings of the 11th International Conference on Advanced Robotics, 3 (2003), ISBN: 972-96889-8-2, p. 1576 - 1581
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W. Elmenreich, R. Ipp (invited): Introduction to TTP/C and TTP/A
Workshop on Time-Triggered and Real-Time Communication Systems, Manno, Switzerland; in: Proceedings of the Workshop on Time-Triggered and Real-Time Communication Systems, 2003; 9 pages
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W. Elmenreich, G. Bauer, H. Kopetz (invited): The Time-Triggered Paradigm
Workshop on Time-Triggered and Real-Time Communication Systems, Manno, Switzerland; in: Proccedings of the Workshop on Time-Triggered and Real-Time Communication Systems, 2003; 9 pages
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K. Tindell, H. Kopetz, F. Wolf, R. Ernst: Safe Automotive Software Development
Conference on Design, Automation and Test in Europe, Munich, Germany; in: Proceedings of the Conference on Design, Automation and Test in Europe, 2003, p. 616 - 621
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S. Pitzek, W. Elmenreich: Configuration and Management of a Real-Time Smart Transducer Network
IEEE Conference on Emerging Technologies and Factory Automation, Lisbon, Portugal; in: Proceedings of the IEEE Conference on Emerging Technologies and Factory Automation, 2003, p. 407 - 414
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R. Kirner, P. Puschner: Transformation of Meta-Information by Abstract Co-Interpretation
7th International Workshop, SCOPES, Vienna, Austria; in: Proceedings of the 7th International Workshop, SCOPES 2003, 2003, p. 298 - 312
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M. Schöberl: Using a Java Optimized Processor in a Real World Application
Workshop on Intelligent Solutions in Embedded Systems, Vienna, Austria; in: Proceedings of the First Workshop on Intelligent Solutions in Embedded Systems, W. Elmenreich (ed.); 2003, p. 165 - 176
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S. Pitzek, P. Puschner: Function Test Framework for Testing IO-Blocks in a Model-Based Rapid Prototyping Development Environment for Embedded Control Applications
Workshop on Intelligent Solutions in Embedded Systems, Vienna, Austria; in: Proceedings of the First Workshop on Intelligent Solutions in Embedded Systems, W. Elmenreich (ed.); 2003, p. 85 - 96
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M. Venzke, S. Pitzek: Accessing TTP/A Fieldbus System via Web Services
Workshop on Intelligent Solutions in Embedded Systems, Vienna, Austria; in: Proceedings of the First Workshop on Intelligent Solutions in Embedded Systems, W. Elmenreich (ed.); 2003, p. 69 - 76
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T. Losert: Adding Hard Real-time Capabilities to CORBA
Workshop on Intelligent Solutions in Embedded Systems, Vienna, Austria; in: Proceedings of the First Workshop on Intelligent Solutions in Embedded Systems, W. Elmenreich (ed.); 2003, p. 57 - 66
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M. Schlager: A Simulation Architecture for Time-Triggered Transducer Networks
Workshop on Intelligent Solutions in Embedded Systems, Vienna, Austria; in: Proceedings of the First Workshop on Intelligent Solutions in Embedded Systems, W. Elmenreich (ed.); 2003, p. 39 - 50
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W. Steiner, W. Elmenreich: Automatic Recovery of the TTP/A Sensor/Actuator Network
Workshop on Intelligent Solutions in Embedded Systems, Vienna, Austria; in: Proceedings of the First Workshop on Intelligent Solutíons in Embedded Systems, W. Elmenreich (ed.); 2003, p. 25 - 37
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R. Kirner, P. Puschner: A Simple and Effective Fully Automatic Worst-Case Execution-Time Analysis for Model-Based Application Development
Workshop on Intelligent Solutions in Embedded Systems, Vienna, Austria; in: Proceedings of the First Workshop on Intelligent Solutions in Embedded Systems, W. Elmenreich (ed.); 2003, p. 15 - 24
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W. Elmenreich: Intelligent Methods for Embedded Systems
Workshop on Intelligent Solutions in Embedded Systems, Vienna, Austria; in: Proceedings of the Workshop on Intelligent Solutions in Embedded Systems, 2003, p. 3 - 11
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R. Kirner, P. Puschner: Timing Analysis of Optimised Code
IEEE International Workshop on Object-Oriented Real-Time Dependable Systems, Guadalajara, Mexico; in: Proceedings of the 8th International Workshop on Object-Oriented Real-Time Dependable Systems, 2003, p. 100 - 105
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M. Delvai, C. El Salloum, A. Steininger: A Generic Real-time Debugger Architecture
World Multiconference on Systemics, cybernetics and Informatics, Orlando, Florida; in: The 7th World Multiconference on Systemics, Cybernetics and Informatics, 2003, p. 65 - 70
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M. Delvai, U. Eisenmann, W. Elmenreich: A Generic Architecture for Integrated Smart Transducers
International Conference, FPL 2003, Lissabon, Portugal
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A. Steininger, B. Rahbaran, T. Handl: Built-in Fault Injectors - The Logical Continuation of BIST?
Workshop on Intelligent Solutions in Embedded Systems (WISES'03), Wien; in: Proceeding of the First Workshop on Intelligent Solutions in Embedded Systems, 2003, p. 187 - 196
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M. Delvai, G. Fuchs: LANCE: A 16 Bit Superscalar Processor
Austrochip, Linz; in: Austrochip 2003, 2003, p. 87 - 90
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M. Delvai, U. Eisenmann, W. Elmenreich: Intelligent UART Module for Real-Time Applications
Workshop on Intelligent Solutions in Embedded Systems (WISES'03), Wien; in: Proceedings of the First Workshop on Intelligent Solutions in Embedded Systems, 2003, p. 177 - 185
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R. Seemann, F. Bruckner, M. Figl, A. Wagner, K. Schicho, W. Elmenreich: Applying a Real-Time Interface to an Optical Tracking System
Workshop on Augmented Reality in Computer Aided Surgery, Interlaken, Switzerland; in: Proceedings of the Workshop on Augmented Reality in Computer Aided Surgery, 2003, p. 87
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W. Elmenreich, S. Pitzek: Smart Transducers - Principles, Communications, and Configuration
7th IEEE International Conference on Intelligent Engineering Systems (INES), Assuit, Luxor, Egypt; in: Proceedings of the 7th IEEE International Conference on Intelligent Engineering Systems (INES), 2003, p. 510 - 515
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A. Ademaj: Achieving Fail Silence in the Time-Triggered Architecture
6th IEEE International Workshop on Design and diagnostics of Electronics Circuits and Systems (DDECS'03), Poznan, Poland; in: Proceedings of the 6th IEEE Int. Workshop on Design and Diagnostics of Electronics Circuits and Systems (DDECS'03), 2003, p. 165 - 170
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P. Puschner: Hard Real-Time Programming is Different
17th International Parallel and Distributed Processing Symposium, Nice, France; in: Proceedings of the 17th IEEE Int'l Parallel and Distributed Processing Symposium, 11th Int'l workshop on Parallel and Distributed Real-Time Systems 2003, 2003, p. 117 - 118
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G. Bauer, H. Kopetz, W. Steiner: The Central Guardian Approach to Enforce Fault Isolation in the Time-Triggered Architecture
6th International Symposium on Autonomous Decentralized Systems (ISADS 03), Pisa, Italy; in: Proceedings of the Sixth International Symposium on Autonomous Decentralized Systems (ISADS 03), 2003, p. 37 - 44
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P. Puschner, R. Kirner: Avoiding Timing Problems in Real-Time Software
IEEE Workshop on Software Technologies for Future Embedded Systems, Hakodate, Hokkaido, Japan; in: Proceedings of the IEEE Workshop on Software Technologies for Future Embedded Systems, 2003, 2003, p. 75 - 78
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R. Kirner, P. Puschner: Discussion of Misconceptions about Worst-Case Execution-Time Analysis
3rd Euromicro International Workshop on WCET Analysis, Porto, Portugal; in: Proceedings of the 3rd Euromicro International Workshop on WCET Analysis, 2003, p. 61 - 64
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M. Delvai, W. Huber, P. Puschner, A. Steininger: Processor Support for Temporal Predictability - The SPEAR Design Example
15th Euromicro Conference on Real-Time Systems, Porto, Portugal; in: Proceedings of the 15 Euromicro International Conference on Real-Time Systems, 2003, p. 169 - 176
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M. Paulitsch, W. Steiner: Fault-Tolerant Clock Synchronization for Embedded Distributed Multi-Cluster Systems
15th Euromicro Conference on Real-Time Systems, Porto, Portugal; in: Proceedings of the 15th Euromicro Conference on Real-Time Systems, 2003, p. 249 - 256
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W. Kastner, B. Thallner: A General Public License Linux Device Driver for the EIB
EIB Scientific Conference and Technology Workshop, Munich, Germany; in: EIB-Proceedings V, 2001
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W. Haidinger: New Node Integration for Master-Slave Fieldbus Networks
RTSG-Seminar, Wien
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P. Atanassov: Summary of Work and Results of Experimental Assessment of WCET
RTSG-Seminar, Wien
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M. Schwarz, C. Eder: NEXT TTA: Gigabit TTP (Workpackage 8)
RTSG-Seminar, Wien
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S. Pitzek: Administration of Scientific Literature with the Paperserver
RTSG-Seminar, Wien
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W. Haidinger: Fehlerkorrigierende Codes
RTSG-Seminar, Wien
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W. Elmenreich: Achieving Dependability in Time-Triggered Networks by Sensor Fusion
RTSG-Seminar, Wien
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W. Elmenreich: A Robust Certainty Grid for Robotic Vision
RTSG-Seminar, Wien
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S. Pitzek: Description Mechanisms Supporting the Configuration and Management of TTP/A Fieldbus Systems
RTSG-Seminar, Wien
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C. Eder: Designing a High-Performant Real-Time Architecture Based on COTS Components
RTSG-Seminar, Wien
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P. Peti: The Concepts of Time, State, Component and Interface - A Literature Survey
RTSG-Seminar, Wien
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T. Losert: Introduction to the Hard Real-Time CORBA Project
RTSG-Seminar, Wien
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A. Ademaj: Slightly-Off-Specification Failures in the Time-Triggered Architecture
RTSG-Seminar, Wien
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A. Ademaj: Setting Break-Points in Distributed Time-Triggered Architecture
RTSG-Seminar, Wien
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W. Elmenreich: Sensor Fusion in Time-Triggered Systems
RTSG-Seminar, Wien
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M. Paulitsch: Research Funding of the European Union
RTSG-Seminar, Wien
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P. Peti: Analysis of the FP6 Eol on Embedded Systems
RTSG-Seminar, Wien
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A. Ademaj: Lessons Learned from the FIT Project
RTSG-Seminar, Wien
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M. Schwarz: Implementation of a TTP/C Cluster Based on Commercial Gigabit Ethernet Components
RTSG-Seminar, Wien
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C. Trödhandl: Improving Compilers for Embedded Systems
RTSG-Seminar, Wien
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W. Steiner: Self-Stabilization in der TTA
RTSG-Seminar, Wien
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G. Gridling, B. Thallner: Simulation of a Wireless CDMA ad hoc network
IASTED Int. Conf. Communictions and Computer Networks, Cambridge, USA; in: Proceedings of the IASTED Internatonal Conference on Communications and Computer Networks, 2002, ISBN: 0-88986-329-6, p. 354 - 359
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R. Höller, M. Horauer, G. Gridling, N. Kerö, U. Schmid, K. Schossmaier: SynUTC - high precision time synchronization over Ethernet networks
8th Workshop on Electronics for LHC Experiments, Colmar; France; in: Proceedings 8th Workshop on Electronics for LHC Experimets (LECC'02), 2002, ISBN: 92-9083-202-9, p. 428 - 432
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W. Kastner, B. Thallner: Connecting EIB to Linux and Java
6th IEEE Africon Conference, George, South Africa; in: Proceedings of the IEEE 6th AFRICON Conference, 2002, ISBN: 0-7803-7570-x, p. 273 - 276
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A. Ademaj: Slightly-Off-Specification Failures in the Time-Triggered Architecture
IEEE International Workshop on High Level Design Validation and Test, Cannes, France; in: Proceedings of the Seventh Annual IEEE International Workshop on High Level Design Validation and Test, 2002, p. 7 - 12
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H. Kopetz: Composability in the Time-Triggered Architecture
SAE International Congress and Exhibition, Detroit, USA; in: Proceedings of the SAE International Congress and Exhibition (2000-01-1382), 2000, p. #
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G. Bauer, H. Kopetz: Transparent Redundancy in the Time-Triggered Architecture
International Conference on Communications in Computing, Las Vegas, USA; in: Proceedings of the International Conference on Communications in Computing, 2000, p. #
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C. Temple: Identifying Bus Failures in a Time-Triggered Communication System Containing Redundant Communication Channels
International Conference on Communications in Computing, Las Vegas, USA; in: Proceedings of the 2000 International Conference on Communications in Computing (CIC 2000), 2000, p. #
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H. Kopetz: Software Engineering for Real-Time: A Roadmap
International Conference on Future of Software Engineering, Limerick, Ireland; in: Proceedings of the 22nd International conference on Future of Software Engineering (FoSE), 2000, p. #
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G. Bauer, T. Frenning, A.K. Jonsson, H. Kopetz, C. Temple: A Centralized Approach for Avoiding the Babbling-Idiot Failure in the time-Triggered Architecture
ICDSN, New York, USA; in: Proceedings of the ICDSN 2000, 2000, p. #
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H. Kopetz, W. Elmenreich, C. Mack: A Comparison of LIN and TTP/A
IEEE International Workshop on Factory Communication Systems, Porto, Portugal; in: Proceedings of the 3rd IEEE International Workshop on Factory Communication Systems (WFCS 2000), 2000, p. 99 - 107
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G. Bauer, M. Paulitsch: An Investigation of Membership and Clique Avoidance in TTP/C
IEEE Symposium on Reliable Distributed Systems, Nürnberg, Germany; in: Proceedings of the 19th IEEE Symposium on Reliable Distributed Systems, 2000, p. #
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R. Kirner, P. Puschner: Supporting Control-Flow-Dependent Execution Times on WCET Calculation
Deutschsprachige WCET-Tagung, Paderborn, Germany; in: Proceedings of the WCET2000 (Deutschsprachige WCET-Tagung), 2000, p. #
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R. Kirner, P. Puschner: Consideration of Optimizing Compilers in the Context of WCET Analysis
Specialized Informatics Congress, Gesellschaft für Informatik e.V., Bad Schussenried, Germany; in: Proceedings of the Informatiktage 2000, Gesellschaft für Informatik e.V., 2000, p. 123 - 126
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P. Atanassov: Estimating the Delay Caused by DRAM Refreshes on the Execution Time of Real-Time Tasks
Specialized Informatics Congress, Gesellschaft für Informatik e.V., Bad Schussenried, Germany; in: Proceedings of the Informatiktage 2000, Specialized Informatics Congress, Gesellschaft für Informatik e.V., 2000, p. #
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C. Scheidler, P. Puschner, S. Boutin, E. Fuchs, G. Grünsteidl, Y. Papadopoulos, J. Rennhack, U. Virnich: Systems Engineering of Time-Triggered Architectures - The SETTA Approach
IFAC Workshop on Distributed Computer Control Systems, Sydney, Australia; in: Proceedings of the 16th IFAC Workshop on Distributed Computer Control Systems, 2000, p. 55 - 60
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R. Kirner, R. Lang, P. Puschner, C. Temple: Integrating WCET Analysis into a Matlab/Simulink Simulation Model
IFAC Workshop on Distributed Computer Control Systems, Sydney, Australia; in: Proceedings of the 16th IFAC Workshop on Distributed Computer Control Systems, 2000, p. 79 - 84
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I. Bate, G. Bernat, G. Murphy, P. Puschner: Low-Level Analysis of a Portable Java Byte Code WCET Analysis Framework
International Conference on Real-Time Computing Systems and Applications, Cheju Island, South Korea; in: Proceedings of the 7th International conference on Real-Time Computing Systems and Applications, 2000, p. 39 - 48
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G. Bauer, H. Kopetz, W. Steiner: Byzantine Fault Containment in TTP/C
International Workshop on Real-Time LANs in the Internet Age, Vienna, Austria; in: Proceedings of the 1st International Workshop on Real-Time LANs in the Internet Age, 2002
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T. Losert: Smart Transducers Interface
OMG Workshop on Embedded & Real-Time Distributed Object Systems, San Francisco, USA
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A. Ademaj: A Methodology for Dependability Evaluation of the Time-Triggered Architecture Using Software Implemented Fault Injection
European Dependable Computing Conference, Tolouse, France; in: Proceedings of the 4th European Dependable Computing Conference, 2002, p. 172 - 190
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H. Sivencrona, J. Torin, A. Ademaj: Deployment of Different Fault Injection Techniques with Respect to Design Phase and Functional Level
IEEE International Conference on Dependable Systems and Networks, Washington DC, USA; in: Proceedings of the International Conference on Dependable Systems & Networks, 2002
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S. Blanc, A. Ademaj, H. Sivencrona, P. Gil, J. Torin: Three Different Fault Injection Techniques Combined to Improve the Detection Efficiency for Time-Triggered Systems
IEEE International Workshop on Desgin & Diagnostic of Electronic Circuits and Systems, Brno, Czech Republic; in: Proceedings of the 5th IEEE International Workshop on Design & Diagnostic of Electronic Circuits and Systems, 2002
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W. Steiner: Presentation on Self-stabilization in the Time-Triggered Architecture
Self-Stabilization Seminar, Luminy, France
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P. Puschner, A. Burns: Writing Temporally Predictable Code
IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), San Diego, USA; in: Proceedings of the 7th IEEE International Workshop on Object-Oriented Real-Time Dependable Systems, 2002, p. 85 - 91
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W. Elmenreich, W. Haidinger, P. Peti, L. Schneider: New Node Integration for Master-Slave Fieldbus Networks
IASTED International Conference on Applied Informatics, Innsbruck, Austria; in: Proceedings of the 20th International Conference on Applied Informatics (AI 2002), 2002, p. 173 - 176
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A. Ademaj, P. Grillinger, J. Hlavicka: Fault Tolerance Evaluation Using two Software Based Fault Injection Methods
International On-Line testing Workshop, France; in: Proceedings of the International On-Line testing Workshop, 2002
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P. Puschner: Making Real-Time Tasks Temporally Predictable
ARTES Real-Time Graduate Student Conference, Uppsala, Sweden; in: Proceedings of the ARTES Real-Time Graduate Student Conference, 2002, p. 7
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I. Bate, G. Bernat, P. Puschner: Java Virtual-Machine Support for Portable Worst-Case Execution-time Analysis
IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Washington, DC, USA; in: Proceedings of the 5th IEEE International Symposium on Object-oriented Real-time distributed Computing, 2002, p. 83 - 90
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R. Kirner, C. Scheidler, G. Grünsteidl, U. Virnich, S. Boutin, J. Rennhack, R. Lang, M. Pisecky, Y. Papadopoulos: Systems Engineering von zeitgesteuerten Systemen - das SETTA Prozessmodell
VDI/VDE GMA Fachtagung, Steuerung und Regelung von Fahrzeugen und Motoren, Mannheim, Deutschland; in: Tagungsband der VDI/VDE GMA Fachtagung, Steuerung und Regelung von Fahrzeugen und Motoren - AutoReg, 2002, p. 662 - 676
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T. Losert: Initial Demonstration of Smart Sensor Case Study: Progress Report
Dependable Systems of Systems Plenary Workshop, Malvern, UK
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W. Elmenreich, P. Peti: Achieving Dependability in Time-Triggered Networks by Sensor Fusion
IEEE International Conference on Intelligent Engineering Systems, Opatija, Croatia; in: Proceedings of the 6th IEEE International Conference on Intelligent Engineering Systems (INES), 2002, p. 167 - 172
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W. Elmenreich, L. Schneider, R. Kirner: A Robust Certainty Grid Algorithm for Robotic Vision
IEEE International Conference on Intelligent Engineering Systems, Opatija, Croatia; in: Proceedings of the 6th IEEE International Conference on Intelligent Engineering Systems (INES), 2002
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P. Puschner: Is Worst-Case Execution-Time Analysis a Non-Problem? -- Towards New Software and Hardware Architectures
Euromicro International Workshop on WCET Analysis, Vienna, Austria; in: Proceedings of the 2nd Euromicro International Workshop on WCET Analysis, 2002
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S. Pitzek, W. Elmenreich: Managing Fieldbus Systems
Euromicro International Conference, Vienna, Austria; in: Proceedings of the Work-in-Progress Session of the 14th Euromicro International Conference, 2002, p. 13 - 16
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S. Bruckner, R. Seemann, W. Elmenreich: Applying a Real-Time Interface to an Optical Tracking System
Euromicro International Conference, Vienna, Austria; in: Proceedings of the Work-in-Progress Session of the 14th Euromicro International Conference, 2002, p. 49 - 52
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P. Peti, R. Obermaisser, W. Elmenreich, T. Losert: An Architecture supporting Monitoring and Configuration in Real-Time Smart Transducer Networks
IEEE International Conference on Sensors, Orlando, Florida; in: Proceedings of the First IEEE International Conference on Sensors, 2 (2002), p. 1479 - 1484
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R. Kirner, R. Lang, G. Freiberger, P. Puschner: Fully Automatic Worst-Case Execution Time Analysis for Matlab/Simulink Models
Euromicro Conference on Real-Time Systems (ECRTS), Vienna, Austria; in: Proceedings of the 14th Euromicro International Conference on Real-Time Systems (ECRTS'02), 2002, p. 31 - 40
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W. Elmenreich, R. Obermaisser: A Standardized Smart Transducer Interface
IEEE International Symposium on Industrial Electronics, L'Aquila, Italy; in: Proceedings of the IEEE International Symposium on Industrial Electronics (ISIE'02), 2002
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H. Kopetz: Time-Triggered Real-Time Computing
IFAC World Congress, Barcelona, Portugal; in: Proceedings of the IFAC World Congress, IFAC Press, 2002
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W. Steiner, M. Paulitsch: The Transition from Asynchronous to Synchronous System Operation: An approach for Distributed Fault -Tolerant Systems
International Conference on Distributed Computing Systems, Vienna, Austria; in: Proceedings of the International Conference on Distributed Computing Systems 2002, 2002, p. 329 - 336
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W. Elmenreich, M. Delvai: Time-Triggered Communication with UARTs
IEEE International Workshop on Factory Communication Systems, Västeraas; in: Proceedings of the 4th IEEE International Workshop on Factory Communication Systems, 2002, p. 97 - 104
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T. Losert: Smart Transducers Interface
OMG Technical Meeting, Helsinki, Finland
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A. Ademaj, I. Smaili: Setting Break-Points in Distributed Time-Triggered Architecture
IEEE International Workshop on High Level Design Validation and Test, Cannes, France; in: Proceedings of the 7th Annual IEEE International Workshop on High Level Design Validation and Test, 2002
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R. Kirner: Enforcing Composability for Ubiquitious Computing Systems
The Cabernet Radicals Workshop, Bertinoro, Italy; in: Proceedings of the 7th Cabernet Radicals Workshop, 2002
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R. Schlatterbeck, W. Elmenreich: TTP/A: A Low Cost Highly Efficient Time-Triggered Fieldbus Architecture
SAE World Congress, Detroit, Michigan, USA; in: Proceedings of the SAE World Congress 2001, 2001, p. 1 - 4
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H. Kopetz, G. Bauer, S. Poledna: Tolerating Arbitrary Node Failures in the Time-Triggered Architecture
SAE World Congress, Detroit, MI, USA; in: Proceedings of the SAE 2001 World Congress, 2001
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W. Elmenreich, S. Pitzek: The Time-Triggered Sensor Fusion Model
IEEE International Conference on Intelligent Engineering Systems, Helsinki, Stockholm; in: Proceedings of the 5th IEEE International Conference on Intelligent Engineering Systems (INES), 2001, p. 297 - 300
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G. Bauer, H. Kopetz, P. Puschner: Assumption Coverage under Different Failure Modes in the Time-Triggered Architecture
IEEE International Conference on Emerging Technologies and Factory Automation, Antibes Juan-les-pins, France; in: Proceedings of the 8th IEEE International Conference on Emerging Technologies and Factory Automation, 2001, p. 333 - 341
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P. Puschner, A. Wellings: A Profile for High-Integrity Real-Time Java Programs
IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Magdeburg, Germany; in: Proceedings of the 4th IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC), 2001, p. 15 - 22
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W. Elmenreich, W. Haidinger, H. Kopetz: Interface Design for Smart Transducers
IEEE Instrumentation and Measurement Technology Conference (IMTC), Budapest, Hungary; in: Proceedings of the IEEE Instrumentation and Measurement Technology Conference (IMTC), Vol. 3 (2001), p. 1642 - 1647
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P. Puschner, G. Bernat: WCET Analysis of Reusable Portable Code
Euromicro Conference on Real-Time Systems (ECRTS), Delft, Netherlands; in: Proceedings of the Euromicro Conference on Real-Time Systems (ECRTS), 2001, p. 45 - 52
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R. Kirner, P. Puschner: Transformation of Path Information for WCET Analysis during Compilation
Euromicro Conference on Real-Time Systems (ECRTS), Delft, Netherlands; in: Proceedings of the 13th Euromicro Conference on Real-Time Systems (ECRTS2001), 2001, p. 29 - 36
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H. Kopetz: The Three Interfaces of a Smart Transducer
IFAC International Conference on Fieldbus Systems and their Applications, Nancy, France; in: Proceedings of the FeT`2001 - 4th IFAC International Conference on Fieldbus Systems and their Applications, 2001
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H. Kopetz: A Universal Smart Transducer Interface
V Simpósio Brasileiro de Automação Inteligente, Canela, Brasilien; in: Proceedings of the V Simpósio Brasileiro de Automação Inteligente, 2001, p. 1 - 8
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W. Elmenreich, S. Pitzek: Using Sensor Fusion in a Time-Triggered Network
Annual Conference of the IEEE Industrial Electronics Society, Denver, Colorado, USA; in: Proceedings of the 27th Annual conference of the IEEE Industrial Electronics Society, 2001, p. 369 - 374
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P. Atanassov, P. Puschner: Impact of DRAM Refresh on the Execution Time of Real-Time Tasks
International Workshop on Application of Reliable Computing and Communication (in conjunction with PRDC 2001), Seoul, Korea; in: Proceedings of the International Workshop on Application of Reliable Computing and Communication (in conjunction with PRDC 2001), 2001, p. 29 - 34
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P. Atanassov, P. Puschner, R. Kirner: Using Real Hardware to Create an Accurate Timing Model for Execution-Time Analysis
IEEE Workshop on Real-Time Embedded Systems, London, United Kingdom; in: Proceedings of the IEEE International Workshop on Real-Time Embeeded Systems (in conjunction with 22nd IEEE RTSS 2001), 2001
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R. Kirner, R. Lang, P. Puschner: WCET Analysis for Systems Modelled in Matlab/Simulink
IEEE Real-Time Systems Symposium, London, United Kingdom; in: Proceedings of the IEEE Real-Time Systems Symposium - Work in Progress Proceedings, 2001, p. 33 - 36
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R Dobrin, G. Fohler, P. Puschner: Translating Offline Schedules into Task Attributes for Fixed Priority Scheduling
IEEE Real-Time Systems Symposium, London, United Kingdom; in: Proceedings of the 22nd IEEE Real-Time Systems Symposium, 2001, p. 225 - 234
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T. Losert, R. Obermaisser: Wireless Real-Time Communication Technologies: A Comparative Study
IEEE Workshop on Real-Time Embedded Systems, London, United Kingdom; in: Proceedings of the IEEE Workshop on Real-Time Embedded Systems, 2001
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H. Kopetz: The Temporal Specification of Interfaces in Distributed Real-Time Systems
International Workshop on Embedded Software, Lake Tahoe, CA, USA; in: Proceedings of the EMSOFT, 2001, p. 223 - 236
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R. Obermaisser, P. Peti, W. Elmenreich, T. Losert: Monitoring and Configuration in a Smart Transducer Network
IEEE Workshop on Real-Time Embedded Systems, London, United Kingdom; in: Proceedings of the IEEE Workshop on Real-Time Embedded Systems, 2001
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K. Thaller: A highly-efficient transparent online memory test
Test Conference, Baltimore, MD, USA; in: Proceedings, 2001, p. 230 - 239
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M. Delvai, U. Eisenmann, W. Huber: Modular Construction System for Embedded Real-Time Applications
Austrochip, Wien; in: Austrochip 2002, 2002, p. 103 - 109
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A. Steininger, C. Scherrer: How To Tune the MTTF of a Fault-Tolerant System
International Symp. on Defect and Fault Tolerance in VLSI-Systems, San Francisco, California, USA; in: PROCEEDINGS, 2001, p. 251 - 256
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C. Scherrer, A. Steininger: How does Resource Utilization Affect Fault Tolerance?
International Symp. on Defect and Fault Tolerance in VLSI-Systems, Mt. Fuji, Yamanashi, Japan; in: PROCEEDINGS, 2000, p. 418 - 425
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C. Scherrer, A. Steininger: Periodic Node Shutdown in a Fail-Silent Architecture - Risk or Rescue?
World Multiconference on Systemics, cybernetics and Informatics, Orlando, Florida, USA; in: PROCEEDINGS, 2000, p. 205 - 210
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J. Vilanek, A. Steininger: FPGA Implementation of the Time-Triggered Protocol Controller TTPC-C Verification, Design-Experiences and Benefits
World Multiconference on Systemics, cybernetics and Informatics, Orlando, Florida, USA; in: PROCEEDINGS, 2002, p. 407 - 412
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A. Steininger, J. Vilanek: Using Offline and Online BIST to Improve System Dependability - The TTPC-C Example
IEEE INTERNATIONAL CONFERENCE ON COMPUTER Design: VLSI in Computers & Processors, Freiburg, Germany; in: Computer Design: VLSI in Computers & Processors, 2002, p. 277 - 280
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M. Delvai, W. Huber, B. Rahbaran, A. Steininger: SPEAR-Design-Entscheidungen für den "Scalable Processor for Embeded Application in Real-Time Environment"
Austrochip, wien; in: Die Österreichische Tagnung zum Themenbereich Mikroelektronik, 2001, p. 25 - 32
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M. Delvai, W. Huber, B. Rahbaran, A. Steininger: An FPGA-Based Development Platform for the virtual Real-Time Processor Component SPEAR
IEEE Design and Diagnostics of Electronic Circuits and Systems (IEEE DDECS 2002), Brno, Czech Republic; in: Proceedings of IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop, 2002, p. 98 - 105
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H. Kopetz, M. Holzmann, W. Elmenreich: A Universal Smart Transducer Interface: TTP/A
IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Newport Beach, CA, USA; in: Proceedings of the third IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC 2000), 2000
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T. Losert, W. Huber, K. Hendling, M. Jandl: An Extensible Transport Framework for CORBA with Emphasis on Real-Time Capabilities
Second IEEE International Conference on Computational Cybernetics 2004 (ICCC'04), Vienna, Austria; in: Proceeding of ICCC'04, 2004, ISBN: 3-902463-01-5, p. 155 - 161
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