Publications

Shows all publications by members of the Institute of Computer Engineering.

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Theses

F. Huemer: Protecting 4-Phase Delay-Insensitive Communication Against Transient Faults (Master's Thesis)
reviewer: A. Steininger; Technische Informatik, 2017; oral examination: 2017-02-20
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S. Varadan: Design of Custom ASIC for Radiation Experiments to Study Single Event Effects (PhD Thesis)
reviewers: C. Metra, M. Krstic; Technische Informatik, 2017; oral examination: 2017-11-24
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E. Ibrahimovic: Life cycle assessment of vehicles with alternative powertrains (Master's Thesis)
reviewers: B. Geringer, C. Six; Institut für Fahrzeugantriebe und Automobiltechnik, 2017
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C. Hermann: ASCARTS Design of an Asynchronous Processor using a High-Level Specification Language (Master's Thesis)
reviewers: A. Steininger, J. Lechner; Institut für Technische Informatik, 2016
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O. Balún: Towards Distributed Controllers Based on Caenorhabditis elegans Locomotory Neural Network (Master's Thesis)
reviewers: R. Grosu, R. M. Hasani; Institut für Technische Informatik, 2016; oral examination: 2016-12-22
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C. Vazcula: The Hobel algorithm - SAT Lösung mit GPU über DPLL (Master's Thesis)
reviewers: E. Bartocci, A. Biere; Institute of Computer Engineering, 2016
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C. Gabriel: Development of an Advanced Protection Concept for Automotive Wire Harnesses (Master's Thesis)
reviewers: R. Grosu, H.-P. Kreuter, D. Ratasich, O. Höftberger; Institut für Technische Informatik, 2016; oral examination: 2016-10-04
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K. Pollhammer: Automated Buildings as Energy Storages (PhD Thesis)
reviewers: D. Dietrich, W. Elmenreich; E384, 2016; oral examination: 2016-02-05
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W. Zischka: Zeitgesteuerte Kommunikation in Hybriden Netzwerk-Topologien (Master's Thesis)
reviewer: S. Poledna; E182, 2015; oral examination: 2015-11-19
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P. Robinson: Weak System Models for Fault-Tolerant Distributed Agreement Problems (PhD Thesis)
reviewers: U. Schmid, M. Raynal; Institut für Technische Informatik (E182/2), 2011; oral examination: 2011-01-31
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A. Kößler: Real-Time Performance Analysis of Synchronous Distributed Systems (PhD Thesis)
reviewers: U. Schmid, K. Chatterjee; Institut für Technische Informatik (E182/2), 2014; oral examination: 2014-11-27
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R. Kutschera: Efficient Interfacing Between Timing Domains (Master's Thesis)
reviewer: A. Steininger; Technische Informatik, 2014
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C. Trenkwalder: Effekte von Stuck-At Faults in Delay-Insensitiver Logik (Master's Thesis)
reviewer: A. Steininger; Technische Informatik, 2014
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J. Maier: Online Test Vector Insertion - A Concurrent Built-In Self-Testing (CBIST) Approach for Asynchronous Logic (Master's Thesis)
reviewer: A. Steininger; Technische Informatik, 2014
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A. Heinisch: Selection and Hardware-Implementation of an Efficient Consensus Algorithm for a Mesochronous System (Master's Thesis)
reviewers: T. Polzer, A. Steininger; Technische Informatik, 2015; oral examination: 2015-01-15
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S. Resch: Composability for Fail-Safe Safety-Critical Systems (PhD Thesis)
reviewers: A. Steininger, W. Elmenreich; Technische Informatik, 2014; oral examination: 2015-01-26
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D. Ratasich: Generic Low-Level Sensor Fusion Framework for Cyber-Physical Systems (Master's Thesis)
reviewers: R. Grosu, O. Höftberger; Institut für Technische Informatik, 2014; oral examination: 2014-04-29
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D. Macher: Intercommunication framework for autonomous real-time systems (Master's Thesis)
reviewers: R. Grosu, O. Höftberger; Institut für Technische Informatik, 2014; oral examination: 2014-04-29
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S. Brugger: Integrating probabilistic information of dynamic environment into maps for enhanced action planning (Master's Thesis)
reviewers: R. Grosu, O. Höftberger; Institut für Technische Informatik, 2014; oral examination: 2014-03-26
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J. Lechner: Building Robust GALS Circuits: Fault-Tolerant and Variation-Aware Design Techniques for Reliable Circuit Operation (PhD Thesis)
reviewers: A. Steininger, J. Sparso; Institut für Technische Informatik, 2014; oral examination: 2014-06-17
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S. Naqvi: A Non-Blocking Fault-Tolerant Asynchronous Networks-on-Chip Router (PhD Thesis)
reviewers: A. Steininger, E. Grass, M. Schöberl; Institut für Technische Informatik, 2013
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W. Friesenbichler: Effects and Mitigation of Transient Faults in Quasi Delay-Insensitive Logic (PhD Thesis)
reviewers: A. Steininger, H. Vierhaus; Institut für Technische Informatik, 2012
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T. Panhofer: Self-Healing Asynchronous Circuits for High-Reliability Applications (PhD Thesis)
reviewers: A. Steininger, H. Vierhaus; Institut für Technische Informatik, 2012
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T. Polzer: A Digital Metastability Model for VLSI Circuits (PhD Thesis)
reviewers: A. Steininger, A. Yakovlev; Institut für Technische Informatik, 2013
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T. Reinbacher: Analysis of Embedded Real-Time Systems at Runtime (PhD Thesis)
reviewers: A. Steininger, J. Schumann, S. Kowalewski; Institut für Technische Informatik, 2013
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M. Ferringer: Asynchronous Logic in Real-Time Systems (PhD Thesis)
reviewers: A. Steininger, G. Fohler; Institut für Technische Informatik, 2012
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T. Kottke: Untersuchung von fehlertoleranten Prozessorarchitekturen für sicherheitsrelevante Automobilanwendungen (PhD Thesis)
reviewers: A. Steininger, H. Wunderlich; Institut für Technische Informatik, 2005
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K. Ambrosch: Mapping Stereo Matching Algorithms to Hardware (PhD Thesis)
reviewers: A. Steininger, R. Siegwart; Institut für Technische Informatik, 2009
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A. Hagmann: Performance Aware Hardware Runtime Monitors (Master's Thesis)
reviewer: A. Steininger; Institut für Technische Informatik, 2013
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K. Pados: Design and Evaluation of an AXI4 Bus System (Master's Thesis)
reviewer: A. Steininger; Institut für technische Informatik, 2013
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O. Hechinger: Analysis of the Failure Behavior of Memory Management Units (Master's Thesis)
reviewer: A. Steininger; Institut für technische Informatik, 2013
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M. Perner: Self-Stabilizing Byzantine Fault-Tolerant Clock Distribution in Grids (Master's Thesis)
reviewer: U. Schmid; Institut für technische Informatik, 2013; oral examination: 2013-10-08
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M. Schwarz: Solving k-Set Agreement in Dynamic Networks (Master's Thesis)
reviewer: U. Schmid; Institut für technische Informatik, 2013; oral examination: 2013-10-08
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K. Winkler: Easy Impossibility Proofs for k-Set Agreement (Master's Thesis)
reviewer: U. Schmid; Institut für technische Informatik, 2013; oral examination: 2013-11-22
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M. Hofstätter: Solving the Labeling Problem - A Byzantine Fault-Tolerant Self-Stabilizing FPGA Prototype based on the FATAL+ Protocol (Master's Thesis)
reviewers: U. Schmid, M Függer; Institut für technische Informatik, 2013; oral examination: 2013-10-08
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B. Fuchs: Elaboration of a Fault-Tolerant Strategy for Space-born Digital Signal Processing Applications (Master's Thesis)
reviewer: A. Steininger; Technische Informatik, 2012
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S. Kandl: A Requirement-Based Systematic Test-Case Generation Method for Safety-Critical Embedded Systems (PhD Thesis)
reviewers: P. Puschner, R. Kirner; 182, 2010; oral examination: 2010-11-17
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T. Nowak: Topology in Distributed Computing (Master's Thesis)
reviewer: U. Schmid; Institut für Technische Informatik - 182/2, 2010
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A. Dielacher: A Pipelined Distributed Fault-Tolerant Clock Generation Algorithm in VLSI - Proofs and Implementation (Master's Thesis)
reviewers: U. Schmid, M Függer; Institut für Technische Informatik - 182/2, 2010
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M Függer: Analysis of On-Chip Fault-Tolerant Distributed Algorithms (PhD Thesis)
reviewers: U. Schmid, L. Welch; Institut für Technische Informatik - 182/2, 2010
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S. Khattab: Efficient Interference Reduction in Low Complex Digital Direct Sequence Spread Spectrum Systems (PhD Thesis)
reviewers: A. Goiser, U. Schmid; E389, 2010; oral examination: 2010-06-02
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M. Biely: Dynamic Aspects of Modelling Distributed Computations (PhD Thesis)
reviewers: U. Schmid, B. Charron-Bost; Institut für Technische Informatik, 2009; oral examination: 2009-11-30
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P Tummeltshammer: Analysis of Common Cause Faults in Dual Core Architectures (PhD Thesis)
reviewers: A. Steininger, Z. Kotasek; Institut für Technische Informatik, 2009; oral examination: 2009-10-20
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H. Moser: A Model for Distributed Computing in Real-Time Systems (PhD Thesis)
reviewers: U. Schmid, L. Welch; Institut für Technische Informatik, 2009; oral examination: 2009-05-20
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G. Fuchs: Fault-Tolerant Distributed Algorithms for On-Chip Tick Generation: Concepts, Implementations and Evaluations (PhD Thesis)
reviewers: A. Steininger, C. Metra; Institut für Technische Informatik, 2009; oral examination: 2009-10-20
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A. Benz: Terahertz Quantum-Cascade Lasers: Carrier Transport and Photonic Crystal Cavities (PhD Thesis)
reviewers: K. Unterrainer, G. Bauer; Institut für Photonik, 2009; oral examination: 2009-12-15
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C. Pitter: Time-Predictable Java Chip-Multiprocessor (PhD Thesis)
reviewers: H. Grünbacher, M. Schoeberl; Institut für Technische Informatik - E182, 2009
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B. Huber: Worst-Case Execution Time Analysis for Real-Time Java (Master's Thesis)
reviewers: H. Grünbacher, M. Schoeberl; Institut für Technische Informatik - E182, 2009
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P. Jahn: Automated Regression Testing of Embedded Devices (Master's Thesis)
reviewers: A. Steininger, A. Reisenbauer; Institut für Technische Informatik, 2009
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T. Polzer: Fault-Tolerant Hardware Implementation of a Consensus Algorithm (Master's Thesis)
reviewers: A. Steininger, T. Handl; Institut für Technische Informatik, 2009
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B. Rieder: Measurement-Based Timing Analysis of Applications written in ANSI-C (PhD Thesis)
reviewers: P. Puschner, J. Knoop; Institut für Technische Informatik, 2009; oral examination: 2009-06-26
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W. Elmenreich: Time-triggered Transducer Networks
Fakultät für Informatik, 2007
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R. Wolfig: A Distributed Platform for an Integrated Modular Avionics (PhD Thesis)
reviewers: S. Poledna, D. Dietrich; 182/1, 2008
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B. Huber: Resource Management in an Integrated Time-Triggered Architecture (PhD Thesis)
reviewers: H. Kopetz, J. Blieberger; Institut 182, 2008; oral examination: 2008-01-01
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M. Schlager: Interface Design for Hardware-in-the-Loop Simulation of Real-Time Systems (PhD Thesis)
reviewers: H. Kopetz, J. Blieberger; Institut 182, 2007; oral examination: 2007-10-09
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M. Wächter: A Self-Checking Pair Architecture for a TT-Ethernet Switch (Master's Thesis)
reviewer: S. Poledna; Institut für Technische Informatik, 2008; oral examination: 2008-10-10
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H. Muhr: Concepts for Virtual Prototyping of Distributed Embedded Systems (PhD Thesis)
reviewers: D. Dietrich, A. Steininger; Institut für Computertechnik, 2008; oral examination: 2008-12-22
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E. Armengaud: A Transparent Online Test Approach for Time-Triggered Communication Protocols (PhD Thesis)
reviewers: A. Steininger, F. Simonot-Lion; Institut für technische Informatik, 2008
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J. Lechner: FSL Tool (Master's Thesis)
reviewer: M. Delvai; Institut f. Technische Informatik, Embedded Computing Systems Group, 2008
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W. Klein: Asynchronous EUART (Master's Thesis)
reviewer: M. Delvai; Institut f. technische Informatik, Embedded Computing Systems Group, 2008
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J. Mosser: AMBA4SPEAR2: An AMBA Extension Module for the SPEAR2 Processor Core (Master's Thesis)
reviewer: M. Delvai; Institut f. Technische Informatik, Embedded Computing Systems Group, 2008
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M. Fletzer: SPEAR2 - An Improved Version of SPEAR (Master's Thesis)
reviewer: M. Delvai; Institut f. Technische Informatik, Embedded Computing Systems Group, 2008
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M. Jeitler: Optimization of FSL Gates (Master's Thesis)
reviewer: M. Delvai; Institut für Technische Informatik, 2008
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B. Krizan: A unit-test platform for design tools for fault-tolerant real-time systems (Master's Thesis)
reviewers: P. Puschner, R. Kirner; E188-1, 2007
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C. El Salloum: Interface Design in the Time-Triggered System-on-Chip Architecture (PhD Thesis)
reviewers: H. Kopetz, W. Kastner; Technische Informatik, 2008; oral examination: 2008-01-14
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K. Steinhammer: Design of an FPGA-Based Time-Triggered Ethernet System (PhD Thesis)
reviewers: H. Kopetz, R. Eier; Institut für Technische Informatik, 2007; oral examination: 2007-01-16
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J. Trojer: Requirement Classification of Dependable Real-Time Systems (Master's Thesis)
reviewers: P. Puschner, R. Kirner; Institut für Technische Informatik, 2007
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B. Leiner: A Partitioning Operating System based on RTAI-LXRT Linux (Master's Thesis)
reviewers: H. Kopetz, R. Obermaisser; Institut für Technische Informatik, 2006
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H. Paulitsch: Fault Injection for Diagnosis and Maintenance in the Time-Triggered Architecture (Master's Thesis)
reviewers: H. Kopetz, P. Peti; Institut für Technische Informatik, 2005; oral examination: 2005-01-01
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M. Kirner: Automatic Loop Bound Analysis of Programs written in C (Master's Thesis)
reviewers: P. Puschner, R. Kirner; Institut für Technische Informatik, 2006; oral examination: 2006-01-01
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M. Höller: Gateway Generation for Virtual Networks in the DECOS Integrated Architecture (Master's Thesis)
reviewers: H. Kopetz, R. Obermaisser; Institut für Technische Informatik, 2006
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D. Riezler: Emulating the Programming Interface of Commercial CAN Controllers in a Time-Triggered Environment (Master's Thesis)
reviewers: H. Kopetz, R. Obermaisser; Institut für Technische Informatik, 2006; oral examination: 2006-01-01
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S. V. Krywult: Real-Time Communication Systems for Small Autonomous Robots (Master's Thesis)
reviewers: D. Dietrich, S. Mahlknecht, W. Elmenreich; Institut für Computertechnik, 2006
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C. Paukovits: Applying Model-Integrated Computing on Time-Triggered Application Development (Master's Thesis)
reviewers: H. Kopetz, W. Elmenreich; Institut für Technische Informatik, 2006
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A. Schörgendorfer: Extended Confidence-Weighted Averaging in Sensor Fusion (Master's Thesis)
reviewers: H. Kopetz, W. Elmenreich; Institut für Technische Informatik, 2006
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B. Huber: Wireless Real-Time Communication for Smart Transducer Networks (Master's Thesis)
reviewers: H. Kopetz, W. Elmenreich; Institut für Technische Informatik, 2004
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M. Borovicka: Design of a Gateway for the Interconnection of Real-Time Communication Hierarchies (Master's Thesis)
reviewers: H. Kopetz, R. Obermaisser, W. Elmenreich; Institut für Technische Informatik, 2003
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I. Wenzel: Measurement-Based Timing Analysis of Superscalar Processors (PhD Thesis)
reviewers: P. Puschner, J. Knoop; Institut für Technische Informatik, 2007; oral examination: 2007-01-16
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R. Gallo: Revision and Verification of an Enhanced UART (Master's Thesis)
reviewers: M. Delvai, A. Steininger; Technische Informatik, E182/2, 2005; oral examination: 2005-01-01
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M. Ferringer: An Asynchronous Hardware Design for Distributed Tick Generation (Master's Thesis)
reviewer: A. Steininger; Technische Informatik, E182/2, 2006; oral examination: 2006-01-01
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M Függer: Fault-Tolerant Distributed Clock Generation in VLSI Systems-on-Chip (Master's Thesis)
reviewer: U. Schmid; Technische Informatik, E182/2, 2006; oral examination: 2006-01-01
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H. Stratil: Advantages and Limitations of Position-based Communication in Wireless Ad-hoc Networks (PhD Thesis)
reviewer: U. Schmid; Technische Informatik, E182/2, 2005; oral examination: 2005-01-01
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M. Hutle: Failure Detection in Sparse Networks (PhD Thesis)
reviewer: U. Schmid; Technische Informatik, E182/2, 2005; oral examination: 2005-01-01
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B. Rahbaran: An Experimental Comparison of Robustness between Synchronous and Asynchronous Logic Design (PhD Thesis)
reviewer: A. Steininger; Technische Informatik, E182/2, 2005; oral examination: 2005-01-01
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W. Huber: Design of an Asynchronous Processor Based on Code Alternation Logic - Exploration of Delay Insensitivity (PhD Thesis)
reviewer: A. Steininger; Technische Informatik, E182/2, 2005; oral examination: 2005-01-01
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M. Schöberl: JOP: A Java Optimized Processor for Embedded Real-Time Systems (PhD Thesis)
reviewers: A. Steininger, P. Puschner; Technische Informatik, E182, 2005; oral examination: 2005-01-01
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I. Wenzel: Principles of Timing Anomalies in Superscalar Processors (Master's Thesis)
reviewers: P. Puschner, R. Kirner; Institut für Technische Informatik, 2003
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P. Peti: Diagnosis and Maintenance in an Integrated Time-Triggered Architecture (PhD Thesis)
reviewers: H. Kopetz, W. Kastner; 182, 2005
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I. Smaili: Real-Time Monitoring for the Time-Triggered Architecture (PhD Thesis)
reviewers: P. Puschner, U. Egly; Institut für Technische Informatik, 2004
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H. Moser: Distributed Construction of a Fault-Tolerant Wireless Communication Topology for Networked Embedded Systems (Master's Thesis)
reviewer: U. Schmid; Institut für Technische Informatik / Embedded Computing Systems, 2005
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P Tummeltshammer: Multiple Constant Multiplication by Time-Multiplexed Mapping of Addition Chains (Master's Thesis)
reviewer: A. Steininger; Institut für Technische Informatik / Embedded Computing Systems, 2004
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T. Handl: Implementierung eines FPGA-basierten Hardware-Fehlerinjektors (Master's Thesis)
reviewer: A. Steininger; Institut für Technische Informatik / Embedded Computing Systems, 2004
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G. Fuchs: A Superscalar 16 Bit Microcontroller for Real-Time Applications (Master's Thesis)
reviewers: A. Steininger, M. Delvai; Institut für Technische Informatik / Embedded Computing Systems, 2004
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D. Albeseder: Experimentelle Verifikation von Synchronitätsannahmen für Computernetzwerke (Master's Thesis)
reviewer: U. Schmid; Institut für Technische Informatik / Embedded Computing Systems, 2004
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M. Delvai: Design of an Asynchronous Processor Based on Code Alternation Logic - Treatment of Non-Linear Data Paths (PhD Thesis)
reviewers: A. Steininger, R. Eier; Institut für Technische Informatik / Embedded Computing Systems, 2005
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J. Widder: Distributed Computing in the Presence of Bounded Asynchrony (PhD Thesis)
reviewers: U. Schmid, M. Jazayeri; Institut für Technische Informatik / Embedded Computing Systems, 2004
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R. Obermaisser: An Integrated Architecture for Event-Triggered and Time-Triggered Control Paradigms (PhD Thesis)
reviewers: H. Kopetz, W. Kastner; 182, 2003
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T. Pedram: Asynchrone Realisierung einer Arithmetic Logic Unit (Master's Thesis)
reviewers: M. Delvai, A. Steininger; Institut für Technische Informatik, 2003
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M. Eggenhofer: Entwicklung eines USB fullspeed VHDL-Cores (Master's Thesis)
reviewers: J. Vilanek, A. Steininger; Institut für Technische Informatik, 2003
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C. El Salloum: Realisierung eines generischen Online Debuggers für Embedded Systems (Master's Thesis)
reviewers: M. Delvai, A. Steininger; Institut für Technische Informatik, 2003
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M. Jankela: Realization of a Re-Usable Offline Debugger for the SPEAR Micro-Controller (Master's Thesis)
reviewers: A. Steininger, M. Delvai; Institut für Technische Informatik, 2002
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B. Thallner: Ein Linuxtreiber für den Europäischen Installationsbus EIB (Master's Thesis)
reviewers: W. Kastner, G. Schildt; Institut für Rechnergestützte Automation, 2001
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H. Stratil: Topology Management and Routing in Wireless Networks - An Overview (Master's Thesis)
reviewer: U. Schmid; 183, 2002
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M. Biely: Byzantine agreement under the perception-based fault model (Master's Thesis)
reviewer: U. Schmid; 183, 2002
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R. Pallierer: Validation of Distributed Algorithms in Time-Triggered Systems by Simulation (PhD Thesis)
reviewer: H. Kopetz; Institut für Technische Informatik, 2000
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R. Kirner: Integration of Static Runtime Analysis and Program Compilation (Master's Thesis)
reviewer: P. Puschner; Institut für Technische Informatik, 2000
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C. Glawan: Monitoring of Real-Time Operating Systems (Master's Thesis)
reviewers: H. Kopetz, S. Poledna; Institut für Technische Informatik, 2000
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M. Mayer: Design and Implementation of a File-System Based Monitoring Interface for the Time-Triggered Communications Protocol TTP/C under Linux (Master's Thesis)
reviewers: H. Kopetz, T. Galla; Institut für Technische Informatik, 2000
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W. Elmenreich: Sensor Fusion in Time-Triggered Systems (PhD Thesis)
reviewers: H. Kopetz, E. Gratz; Institut für Technische Informatik, 2002
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M. Paulitsch: Fault-Tolerant Clock Synchronization for Embedded Distributed Multi-Cluster Systems (PhD Thesis)
reviewer: H. Kopetz; Institut für Technische Informatik, 2002
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G. Bauer: Transparent Fault Tolerance in a Time-Triggered Architecture (PhD Thesis)
reviewer: H. Kopetz; Institut für Technische Informatik, 2001
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L Müller: Performance Demonstrator (Master's Thesis)
reviewers: P. Puschner, R. Kirner; Institut für Technische Informatik, 2002
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S. Pitzek: Description Mechanisms Supporting the Configuration and Management of TTP/A Fieldbus Systems (Master's Thesis)
reviewers: H. Kopetz, W. Elmenreich; Institut für Technische Informatik, 2002
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C. Trödhandl: Architectural Requirements for TTP/A Nodes (Master's Thesis)
reviewers: H. Kopetz, W. Elmenreich; Institut für Technische Informatik, 2002
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C. Eder: Designing a High-Performant Real-Time Architecture Based on COTS-Components (Master's Thesis)
reviewer: H. Kopetz; Institut für Technische Informatik, 2002
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M. Weiskirchner: JAVA in Echtzeitsystemen mit Bezug auf die WCET und Analysierbarkeit des Java Bytecodes (Master's Thesis)
reviewer: P. Puschner; Institut für Technische Informatik, 2001
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G. Freiberger: Integration of Worst-Case Execution Time Analysis and C Code Synthesis (Master's Thesis)
reviewers: P. Puschner, R. Lang; Institut für Technische Informatik, 2001
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P. Peti: Monitoring and Configuration of a TTP/A Cluster in an Autonomous Mobile Robot (Master's Thesis)
reviewers: H. Kopetz, W. Elmenreich; Institut für Technische Informatik, 2001
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L. Schneider: Real Time Robot Navigation with a Smart Transducer Network (Master's Thesis)
reviewers: H. Kopetz, W. Elmenreich; Institut für Technische Informatik, 2001
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R. Kapeller: Design and Implementation of a TTP/A Master and Gateway Controller on a 32-bit Microcontroller (Master's Thesis)
reviewers: H. Kopetz, W. Haidinger; Institut für Technische Informatik, 2001
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R. Obermaisser: Design and Implementation of a Smart Transducer Network (Master's Thesis)
reviewers: H. Kopetz, W. Elmenreich; Institut für Technische Informatik, 2001
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W. Steiner: Start-Up of TTP/C: Analysis and Simulation (Master's Thesis)
reviewers: H. Kopetz, M. Paulitsch; Institut für Technische Informatik, 2001
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M. Hutle: Constraint Satisfaction Problems - Hyprid Decompostion and Evaluation (Master's Thesis)
reviewer: F. Wotawa; Institut für Informationssysteme, 2002
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J. Vilanek: Synthese eines SAB-R3223 in VHDL und State Charts (Master's Thesis)
Institut für Technische Informatik, 1997
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M. Delvai: Entwicklung eines Mikrokontrollers für das Echtzeitprotokoll TTP/A (Master's Thesis)
reviewers: A. Steininger, W. Elmenreich; Institut für Technische Informatik, 2000
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W. Huber: Simulation einer SCSI-Festplatte unter LINUX (Master's Thesis)
reviewer: A. Steininger; Institut für Technische Informatik, 2000
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T. Hinterstoisser: Entwicklung eines Mikroprozessorsmit Built-in Self-Test (Master's Thesis)
reviewer: A. Steininger; Institut für Technische Informatik, 2000
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E. Armengaud: Data Path for a FlrxRay-to-FlexRay Gateway (Master's Thesis)
reviewer: A. Steininger; Institut für Technische Informatik, 2002
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R. Steinwendtner: Experimentelle Verifikation eines Transparent Online Memory Test (Master's Thesis)
reviewer: A. Steininger; Institut für Technische Informatik, 2000
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C. Resanka: Communication protocol test device in VHDL (Master's Thesis)
reviewer: A. Steininger; Institut für Technische Informatik, 2002
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U. Eisenmann: Design and implementation of a highly efficient communication node for real-time applications (Master's Thesis)
reviewers: A. Steininger, M. Delvai; Institut für Technische Informatik, 2002
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K. Thaller: A Transparent Online Memory Test (PhD Thesis)
reviewers: A. Steininger, R. Eier; Institut für Technische Informatik, 2001
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C. Scherrer: Zuverlässigkeit zweifach redundanter Architekturen unter besonderer Berücksichtigung latenter Fehler (PhD Thesis)
reviewers: A. Steininger, R. Patzelt; Institut für Technische Informatik, 2002
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J. Vilanek: Zur Rolle der Verifikation im Designprozess digitaler integrierter Schaltungen (PhD Thesis)
reviewers: A. Steininger, R. Eier; Institut für Technische Informatik, 2001
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M. Horauer: Clock Synchronization in Distributed Systems (PhD Thesis)
reviewers: R. Eier, U. Schmid; Institut für Computertechnik, 2004
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