Publications

Shows all publications by members of the Institute of Computer Engineering.

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U. Schmid, A. Steininger, H. Veith: Towards a Systematic Design of Fault-Tolerant Asynchronous Circuits
GMM/GI/ITG-Fachtagung Zuverlässigkeit und Entwurf, München; in: Fachtagung Zuverlässigkeit und Entwurf, VDE Verlag, 2007, ISBN: 978-3-8007-3023-0, p. 173 - 174
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W. Elmenreich, H. Piontek, J. Kaiser: Interface Design for Real-Time Smart Transducer Networks - Examining COSMIC, LIN, and TTP/A as Case Study
International Conference on Real-Time and Network Systems (RTNS), Nancy, France; in: Proceedings of the 15th International Conference on Real-Time and Network Systems, Institut National Polytechnique de Lorraine, Nancy, France (2007), ISBN: 2-905267-53-4, p. 195 - 204
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T. Kottke, A. Steininger: Vergleich zweier zwischen Sicherheit und Performanz rekonfigurierbarer Prozessorsysteme
19. ITG/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Errlangen; in: 19. Workshop - Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2007
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T. Handl, A. Steininger, G. Kempf: An Efficient Test Strategy for a Fault-Tolerant Clock Generator for Systems-on-Chip
19. ITG/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Errlangen; in: 19. Workshop - Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2007, p. 66 - 70
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K. Steinhammer: Design of an FPGA-Based Time-Triggered Ethernet System (PhD Thesis)
reviewers: H. Kopetz, R. Eier; Institut für Technische Informatik, 2007; oral examination: 2007-01-16
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J. Trojer: Requirement Classification of Dependable Real-Time Systems (Master's Thesis)
reviewers: P. Puschner, R. Kirner; Institut für Technische Informatik, 2007
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J. Blieberger, B. Burgstaller, R. Mittermayr: Static Detection of Livelocks in Ada Multitasking Programs
Reliable Software Technologies - Ada-Europe, Geneva, Switzerland; in: Proc. Ada-Europe 2007, Springer-Verlag, LNCS 4498 (2007), ISBN: 978-3-540-73229-7, p. 69 - 83
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B. Scholz, J. Blieberger: A new Elimination-Based Data Flow Analysis Framework Using Annotated Decomposition Trees
International Conference on Compiler Construction, Braga, Portugal; in: Proc. ETAPS'07, LNCS, Springer-Verlag, 4420 (2007), ISBN: 978-3-540-71228-2, p. 202 - 217
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I. Wenzel: Measurement-Based Timing Analysis of Superscalar Processors (PhD Thesis)
reviewers: P. Puschner, J. Knoop; Institut für Technische Informatik, 2007; oral examination: 2007-01-16
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D. Dietrich, G. Fodor, W. Kastner, M. Ulieru: Considering a technical realization of a neuro-psychoanalytical model of the mind
1st International Engineering & Neuro-Psychoanalysis Forum (ENF 2007), Wien; in: Proceedings of ENF 2007 - 1st International Engineering & Neuro-Psychoanalysis Forum, 2007, p. 13 - 20
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E. Kirda, Ch. Krügel, G. Banks, G. Vigna, R. Kemmerer: Bahavior-based Spyware Detection
Usenix Security Symposium, Vancouver, Canada; in: Proc. 15th USENIX Security Symposium, 2006, ISBN: 1-931971-45-5, p. 273 - 288
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C. Reinisch, W. Granzer, G. Neugschwandtner, F. Praus, W. Kastner: Wireless Communication in KNX/EIB
KNX Scientific Conference, Vienna, Austria; in: Proceedings KNX Scientific Conference 2006, 2006; 15 pages
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W. Elmenreich, A. Schörgendorfer (invited): Fusion of Continuous-Valued Sensor Measurements using Statistical Analysis
International Symposium on Mathematical Methods in Engineering, Ankara, Turkey; in: Proceedings of the International Symposium on Mathematical Methods in Engineering, K. Tas, D. Baleanu, J.A.T. Machado (ed.); 2006, ISBN: 975-6734-04-3; 10 pages
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A. Hanzlik: SIDERA - a Simulation Model for Time-Triggered Distributed Systems
International Review on Computers and Software (IRECOS), 1 (2006), p. 181 - 193
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A. Hanzlik: Stability and Performance Analysis of Clock Synchronization in FlexRay
International Review on Computers and Software (IRECOS), 1 (2006), p. 146 - 155
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B. Leiner: A Partitioning Operating System based on RTAI-LXRT Linux (Master's Thesis)
reviewers: H. Kopetz, R. Obermaisser; Institut für Technische Informatik, 2006
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M. Kirner: Automatic Loop Bound Analysis of Programs written in C (Master's Thesis)
reviewers: P. Puschner, R. Kirner; Institut für Technische Informatik, 2006; oral examination: 2006-01-01
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M. Höller: Gateway Generation for Virtual Networks in the DECOS Integrated Architecture (Master's Thesis)
reviewers: H. Kopetz, R. Obermaisser; Institut für Technische Informatik, 2006
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D. Riezler: Emulating the Programming Interface of Commercial CAN Controllers in a Time-Triggered Environment (Master's Thesis)
reviewers: H. Kopetz, R. Obermaisser; Institut für Technische Informatik, 2006; oral examination: 2006-01-01
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H. Kopetz (invited): Pulsed Data Streams
IFIP Working Conference on Distributed and Parallel Embedded Systems, Braga, Portugal; in: 5th IFIP Working Conference on Distributed and Parallel Embedded Systems, Proceedings, B. Kleinjohann, L. Kleinjohann, R.J. Machado, C. Pereira, P. Thiagarajan (ed.); Springer, 2006, ISBN: 0-387-39361-7, p. 105 - 114
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