Publications

Shows all publications by members of the Institute of Computer Engineering.

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H. Chung, P. Robinson, L. Welch: Regional Consecutive Leader Election in Mobile Ad-Hoc Networks
ACM SIGACT/SIGMOBILE (International Workshop on FOUNDATIONS OF MOBILE COUMPUTING), Cambridge, Massachusetts, USA; in: Proceedings of the 6th International Workshop on Foundations of Mobile Computing, ACM, 2010, ISBN: 9781450304139, p. 81 - 90
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H. Chung, P. Robinson, L. Welch: Brief Announcement: Regional Consecutive Leader Election in Mobile Ad-Hoc Networks
ALGOSENSORS 2010 (6th International Workshop on Algorithmic Aspects of Wireless Sensor Networks), Bordeaux, France; in: Algorithms for Sensor Systems - LNCS, Springer, 6451/2010 (2010), ISBN: 9783642169878, p. 90 - 91
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A. Kößler, H. Moser, U. Schmid: Real-Time Analysis of Round-based Distributed Algorithms
RTSOPS 2010 (1st International Real-Time Scheduling Open Problems Seminar), Brussels, Belgium; in: Proceedings of the 1st International Real-Time Scheduling Open Problems Seminar, 2010, p. 9 - 11
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M. Ferringer: Investigating Self-Timed Circuits for the Time-Triggered Protocol
5th International Workshop on Reconfigurable Communication Centric System-on-Chips, Workshop Proceedings (ReCoSoC), Karlsruhe, Germany; in: Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip 2010, KIT Scientific Publishing - DFG, 2010, ISBN: 9783866445154, p. 101 - 108
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M. Ferringer: Towards self-timed logic in the Time-Triggered Protocol
DSN 2010 (International Conference on Dependable Systems and Networks), Chicago, IL, USA; in: DSN 2010 - Full Program, IEEE Computer Society, 2010, ISBN: 9781424477289, p. 136 - 141
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M Függer, A. Dielacher, U. Schmid: How to Speed-Up Fault-Tolerant Clock Generation in VLSI Systems-on-Chip via Pipelining
EDCC - 8 (European Dependable Computing Conference), Valencia, Spain; in: Proceedings of the Eight European Dependable Computing Conference, IEEE Computer Society, 2010, ISBN: 9780769540078, p. 230 - 239
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M. Jeitler, J. Lechner, A. Steininger: Enhancing Pipelined Processor Architectures with Fast Autonomous Recovery of Transient Faults
DDECS 2010 (Design and Diagnostics of Electronic Circuits and Systems), Vienna, Austria; in: 13th IEEE International Symposium On Design And Diagnostics Of Electronic Cicruits And Systems, IEEE Computer Society, 2010, ISBN: 9781424466108, p. 233 - 236
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M. Jeitler, J. Lechner: Low Latency Recovery from Transient Faults for Pipelined Processor Architectures
DSD 2010 (Euromicro Conference on Digital System Design), Lille, France; in: Proceedings DSD 2010 (Euromicro Conference on Digital System Design), IEEE Computer Society, 2010, ISBN: 9780769541716, p. 219 - 225
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B. Charron-Bost, M. Hutle, J. Widder: In search of lost time
Information Processing Letters, 110 (2010), p. 928 - 933
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C. Pitter, M. Schoeberl: A real-time Java chip-multiprocessor
ACM Transactions on Embedded Computing Systems, 10 (2010), p. 1 - 34
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R. Obermaisser, R. Kammerer: A Router for Improved Fault Isolation, Scalability and Diagnosis in CAN
IEEE International Conference on Industrial Informatics (INDIN 2010), Osaka, Japan; in: A Router for Improved Fault Isolation, Scalability and Diagnosis in CAN, 2010, p. 121 - 127
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W. Puffitsch, B. Huber, M. Schoeberl: Worst-Case Analysis of Heap Allocations
4th International Symposium On Leveraging Applications of Formal Methods, Verification and Validation (ISoLA 2010), Heraklion, Griechenland; in: Worst-Case Analysis of Heap Allocations, Lecture Notes in Computer Science, 6416 (2010), p. 464 - 478
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S. Kandl, R. Kirner: Error Detection Rate of MC/DC for a Case Study from the Automotive Domain
8th IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems, Waidhofen/Ybbs, Austria; in: Software Technologies for Embedded and Ubiquitous Systems, Lecture Notes in Computer Science, Volume 6399 (2010), p. 131 - 142
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R. Obermaisser, J. Perez, C. El Salloum, Carlos Nicolas: Modeling Time-Triggered Architecture Based Safety-Critical Embedded Systems Using SystemC
Forum on specification & Design Languages (FDL), Southampton, UK; in: Modeling Time-Triggered Architecture Based Safety-Critical Embedded Systems Using SystemC, 2010
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R. Kirner, P. Puschner: Time-Predictable Computing
8th IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems, Waidhofen/Ybbs, Austria; in: Time-Predictable Computing, 2010, p. 23 - 34
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R. Kirner, P. Puschner, A. Prantl: Transforming Flow Information during Code Optimization for Timing Analysis
Real-Time Systems, 45 (2010), p. 72 - 105
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A. Kadlec, R. Kirner, P. Puschner: Avoiding Timing Anomalies Using Code Transformations
Proceedings of 13th IEEE International Symposium on Object/component/service-oriented Real-time distributed computing (ISORC'10), Carmona, Seville, Spein; in: Avoiding Timing Anomalies Using Code Transformations, IEEE, 2010, ISBN: 978-1-4244-7083-9, p. 123 - 132
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B. Cilku, P. Puschner: Towards a Time-Predictable Hierarchical Memory Architecture - Prefetching Options to be Explored
Proc. 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops (ISORCW 2010), Carmona, Sevilla, Spain; in: Towards a Time-Predictable Hierarchical Memory Architecture - Prefetching Options to be Explored, 2010, p. 219 - 225
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M. Zolda, S. Bünte, R. Kirner: Context-Sensitivity in IPET for Measurement-Based Timing Analysis
4th International Symposium On Leveraging Applications of Formal Methods, Verification and Validation (ISoLA 2010), Heraklion, Griechenland; in: Context-Sensitivity in IPET for Measurement-Based Timing Analysis, Lecture Notes in Computer Science, 6416 (2010), p. 487 - 490
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H. Fallmann: Covertly probing underground economy marketplaces (Master's Thesis)
reviewers: W. Kastner, G. Wondracek; Rechnergestützte Automation, Automatisierungssysteme, 2010; oral examination: 2010-05-05
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