Publications

Shows all publications by members of the Institute of Computer Engineering.

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G. Freiberger: Integration of Worst-Case Execution Time Analysis and C Code Synthesis (Master's Thesis)
reviewers: P. Puschner, R. Lang; Institut für Technische Informatik, 2001
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P. Peti: Monitoring and Configuration of a TTP/A Cluster in an Autonomous Mobile Robot (Master's Thesis)
reviewers: H. Kopetz, W. Elmenreich; Institut für Technische Informatik, 2001
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L. Schneider: Real Time Robot Navigation with a Smart Transducer Network (Master's Thesis)
reviewers: H. Kopetz, W. Elmenreich; Institut für Technische Informatik, 2001
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R. Kapeller: Design and Implementation of a TTP/A Master and Gateway Controller on a 32-bit Microcontroller (Master's Thesis)
reviewers: H. Kopetz, W. Haidinger; Institut für Technische Informatik, 2001
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R. Obermaisser: Design and Implementation of a Smart Transducer Network (Master's Thesis)
reviewers: H. Kopetz, W. Elmenreich; Institut für Technische Informatik, 2001
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W. Steiner: Start-Up of TTP/C: Analysis and Simulation (Master's Thesis)
reviewers: H. Kopetz, M. Paulitsch; Institut für Technische Informatik, 2001
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R. Schlatterbeck, W. Elmenreich: TTP/A: A Low Cost Highly Efficient Time-Triggered Fieldbus Architecture
SAE World Congress, Detroit, Michigan, USA; in: Proceedings of the SAE World Congress 2001, 2001, p. 1 - 4
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H. Kopetz, G. Bauer, S. Poledna: Tolerating Arbitrary Node Failures in the Time-Triggered Architecture
SAE World Congress, Detroit, MI, USA; in: Proceedings of the SAE 2001 World Congress, 2001
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W. Elmenreich, S. Pitzek: The Time-Triggered Sensor Fusion Model
IEEE International Conference on Intelligent Engineering Systems, Helsinki, Stockholm; in: Proceedings of the 5th IEEE International Conference on Intelligent Engineering Systems (INES), 2001, p. 297 - 300
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G. Bauer, H. Kopetz, P. Puschner: Assumption Coverage under Different Failure Modes in the Time-Triggered Architecture
IEEE International Conference on Emerging Technologies and Factory Automation, Antibes Juan-les-pins, France; in: Proceedings of the 8th IEEE International Conference on Emerging Technologies and Factory Automation, 2001, p. 333 - 341
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P. Puschner, A. Wellings: A Profile for High-Integrity Real-Time Java Programs
IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Magdeburg, Germany; in: Proceedings of the 4th IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC), 2001, p. 15 - 22
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W. Elmenreich, W. Haidinger, H. Kopetz: Interface Design for Smart Transducers
IEEE Instrumentation and Measurement Technology Conference (IMTC), Budapest, Hungary; in: Proceedings of the IEEE Instrumentation and Measurement Technology Conference (IMTC), Vol. 3 (2001), p. 1642 - 1647
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P. Puschner, G. Bernat: WCET Analysis of Reusable Portable Code
Euromicro Conference on Real-Time Systems (ECRTS), Delft, Netherlands; in: Proceedings of the Euromicro Conference on Real-Time Systems (ECRTS), 2001, p. 45 - 52
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R. Kirner, P. Puschner: Transformation of Path Information for WCET Analysis during Compilation
Euromicro Conference on Real-Time Systems (ECRTS), Delft, Netherlands; in: Proceedings of the 13th Euromicro Conference on Real-Time Systems (ECRTS2001), 2001, p. 29 - 36
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H. Kopetz: The Three Interfaces of a Smart Transducer
IFAC International Conference on Fieldbus Systems and their Applications, Nancy, France; in: Proceedings of the FeT`2001 - 4th IFAC International Conference on Fieldbus Systems and their Applications, 2001
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H. Kopetz: A Universal Smart Transducer Interface
V Simpósio Brasileiro de Automação Inteligente, Canela, Brasilien; in: Proceedings of the V Simpósio Brasileiro de Automação Inteligente, 2001, p. 1 - 8
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W. Elmenreich, S. Pitzek: Using Sensor Fusion in a Time-Triggered Network
Annual Conference of the IEEE Industrial Electronics Society, Denver, Colorado, USA; in: Proceedings of the 27th Annual conference of the IEEE Industrial Electronics Society, 2001, p. 369 - 374
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P. Atanassov, P. Puschner: Impact of DRAM Refresh on the Execution Time of Real-Time Tasks
International Workshop on Application of Reliable Computing and Communication (in conjunction with PRDC 2001), Seoul, Korea; in: Proceedings of the International Workshop on Application of Reliable Computing and Communication (in conjunction with PRDC 2001), 2001, p. 29 - 34
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P. Atanassov, P. Puschner, R. Kirner: Using Real Hardware to Create an Accurate Timing Model for Execution-Time Analysis
IEEE Workshop on Real-Time Embedded Systems, London, United Kingdom; in: Proceedings of the IEEE International Workshop on Real-Time Embeeded Systems (in conjunction with 22nd IEEE RTSS 2001), 2001
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R. Kirner, R. Lang, P. Puschner: WCET Analysis for Systems Modelled in Matlab/Simulink
IEEE Real-Time Systems Symposium, London, United Kingdom; in: Proceedings of the IEEE Real-Time Systems Symposium - Work in Progress Proceedings, 2001, p. 33 - 36
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