Publications

Shows all publications by members of the Institute of Computer Engineering.

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D. Dietrich, W. Kastner, T. Sauter, O. Nizamutdinov: Sistema avtomatizatsii zdanii (Übersetzung ins Russische)
Hüthig-Verlag, Heidelberg, 2001, ISBN: 5-88151-296-0; 378 pages
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W. Kastner, M. Leupold: How Dynamic Networks Work: A Short Tutorial on Spontaneous Networks
ETFA, Antibes Juan-les-pins, France; in: Proceedings 8th IEEE Conference on Emerging Technologies and Factory Automation, 2001, p. 295 - 305
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W. Kastner, M. Wabel: JAPE - Administrations- und Projektierungstool zur spontanen Vernetzung von EIB-Systemen
APC, Munich, Germany; in: Kongressband zur Fachtagung der GI/ITG Fachgruppe APS+PC zum Thema Pervasive Ubiquitous Computing, 2001, p. 159 - 167
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W. Kastner, B. Thallner: A General Public License Linux Device Driver for the EIB
EIB Scientific Conference and Technology Workshop, Munich, Germany; in: EIB-Proceedings V, 2001
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W. Kastner, M. Leupold: Discovering Internet Services: Integrating Intelligent Home Automation Systems into Plug and Play Networks
I2CS, Ilmenau, Germany; in: LNCS - Proceedings Innovative Internet Computing Systems, Springer-Verlag, 2060 (2001), ISBN: 3-540-42275-7, p. 63 - 75
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W. Kastner: Dynamic internet connectivity of automation systems
TU Wien, Technisch-Naturwissenschaftliche Fakultät, 2001
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J. Blieberger: WCET Anlaysis for Multi-Threaded Applications on Multi-Processor Systems
WCET Workshop of the EUROMICRO Conference on Real-Time Systems, Delft, The Netherlands
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J. Blieberger: Real-Time Properties of Indirect Recursive Procedures
Information and Computation, 171 (2001), p. 156 - 182
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G. Bauer: Transparent Fault Tolerance in a Time-Triggered Architecture (PhD Thesis)
reviewer: H. Kopetz; Institut für Technische Informatik, 2001
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M. Weiskirchner: JAVA in Echtzeitsystemen mit Bezug auf die WCET und Analysierbarkeit des Java Bytecodes (Master's Thesis)
reviewer: P. Puschner; Institut für Technische Informatik, 2001
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G. Freiberger: Integration of Worst-Case Execution Time Analysis and C Code Synthesis (Master's Thesis)
reviewers: P. Puschner, R. Lang; Institut für Technische Informatik, 2001
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P. Peti: Monitoring and Configuration of a TTP/A Cluster in an Autonomous Mobile Robot (Master's Thesis)
reviewers: H. Kopetz, W. Elmenreich; Institut für Technische Informatik, 2001
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L. Schneider: Real Time Robot Navigation with a Smart Transducer Network (Master's Thesis)
reviewers: H. Kopetz, W. Elmenreich; Institut für Technische Informatik, 2001
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R. Kapeller: Design and Implementation of a TTP/A Master and Gateway Controller on a 32-bit Microcontroller (Master's Thesis)
reviewers: H. Kopetz, W. Haidinger; Institut für Technische Informatik, 2001
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R. Obermaisser: Design and Implementation of a Smart Transducer Network (Master's Thesis)
reviewers: H. Kopetz, W. Elmenreich; Institut für Technische Informatik, 2001
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W. Steiner: Start-Up of TTP/C: Analysis and Simulation (Master's Thesis)
reviewers: H. Kopetz, M. Paulitsch; Institut für Technische Informatik, 2001
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R. Schlatterbeck, W. Elmenreich: TTP/A: A Low Cost Highly Efficient Time-Triggered Fieldbus Architecture
SAE World Congress, Detroit, Michigan, USA; in: Proceedings of the SAE World Congress 2001, 2001, p. 1 - 4
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H. Kopetz, G. Bauer, S. Poledna: Tolerating Arbitrary Node Failures in the Time-Triggered Architecture
SAE World Congress, Detroit, MI, USA; in: Proceedings of the SAE 2001 World Congress, 2001
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W. Elmenreich, S. Pitzek: The Time-Triggered Sensor Fusion Model
IEEE International Conference on Intelligent Engineering Systems, Helsinki, Stockholm; in: Proceedings of the 5th IEEE International Conference on Intelligent Engineering Systems (INES), 2001, p. 297 - 300
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G. Bauer, H. Kopetz, P. Puschner: Assumption Coverage under Different Failure Modes in the Time-Triggered Architecture
IEEE International Conference on Emerging Technologies and Factory Automation, Antibes Juan-les-pins, France; in: Proceedings of the 8th IEEE International Conference on Emerging Technologies and Factory Automation, 2001, p. 333 - 341
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