Publications

Shows all publications by members of the Institute of Computer Engineering.

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I. Wenzel, B. Rieder, R. Kirner, P. Puschner: Automatic Timing Model Generation by CFG Partitioning and Model Checking
Conference on Design, Automation and Test in Europe, Munich, Germany; in: Proceedings of the Conference on Design, Automation and Test in Europe (DATE 2005), 2005, ISBN: 0-7695-2288-2, p. 606 - 611
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S. Pitzek, W. Elmenreich: Configuration and Management of Fieldbus Systems
The Industrial Communication Technology Handbook, CRC Press, Boca Raton,FL 33431, USA, 2005, ISBN: 0-8493-3077-7, p. 18-1 - 18-20
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H. Kopetz, G. Bauer, W. Steiner: Dependable Time-Triggered Communication
The Industrial Communication Technology Handbook, CRC Press, Boca Raton,FL 33431, USA, 2005, ISBN: 0-8493-3077-7
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H. Kopetz, R. Obermaisser, U. Schmid (invited): Dependable Embedded Systems Research at TU Vienna
Elektrotechnik und Informationstechnik (e&i), 1 (2005), p. 33 - 37
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B. Burgstaller: Symbolic Evaluation of Imperative Programming Languages (PhD Thesis)
reviewers: J. Blieberger, B. Gramlich; 183, 2005
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U. Schmid, A. Steininger: Dezentrale Fehlertolerante Taktgenerierung in VLSI Chips
patent: Österreich, submitted: 2004-01-01
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H. Moser: Distributed Construction of a Fault-Tolerant Wireless Communication Topology for Networked Embedded Systems (Master's Thesis)
reviewer: U. Schmid; Institut für Technische Informatik / Embedded Computing Systems, 2005
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M. Delvai: Design of an Asynchronous Processor Based on Code Alternation Logic - Treatment of Non-Linear Data Paths (PhD Thesis)
reviewers: A. Steininger, R. Eier; Institut für Technische Informatik / Embedded Computing Systems, 2005
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H. Kopetz, G. Bauer: Time Triggered Communication Networks
Industrial Information Technology Handbook, CRC Press, Boca Raton,FL 33431, USA, 2005, ISBN: 0-8493-1985-4
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B. Huber: Wireless Real-Time Communication for Smart Transducer Networks (Master's Thesis)
reviewers: H. Kopetz, W. Elmenreich; Institut für Technische Informatik, 2004
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H. Kopetz (invited): On the Fault Hypothesis for a Safety-Critical Real-Time System
Future Generation Software Architectures in the Automotive Domain, San Diego, USA; in: On the Fault Hypothesis for a Safety-Critical Real-Time System, H. Kopetz (ed.); 2004
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A. N. Rapaka, W. Elmenreich, D. Wunsch: TTP/A Protocol and Design
Circuit Cellar, 2004, p. 12 - 21
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I. Smaili: Real-Time Monitoring for the Time-Triggered Architecture (PhD Thesis)
reviewers: P. Puschner, U. Egly; Institut für Technische Informatik, 2004
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J. Puchinger, G. Raidl, G. Koller: Solving a real-world glass cutting problem
EVOCOP: 4th European Conference on Evolutionary Computation in Combinatorial Optimization, Coimbra, Portugal
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J. Puchinger, G. Raidl: Models and algorithms for three-stage two-dimensional bin packing.
Technical Report TR 186-1-04-04, submitted to EJOR, 2004
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H. Stratil: An efficient implementation of the greedy forwarding strategy
Research Report 16/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria, 2004
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B. Thallner, U. Schmid: Distributed Construction of Sparse Fault-Tolerant Overlay Networks
Research Report 35/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria, 2004
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C. Fetzer, U. Schmid: On the Possibility of Consensus in Asynchronous Systems with Finite Average Response Times
Research Report 14/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria, 2004
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J. Widder (invited): Why, Where and How to Use the Theta-Model
Seminaire Reflecs in INRIA Rocquencourt, Frankreich, INRIA Rocquencourt, Frankreich
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J. Widder: VLSI Design and the Theta-Model (Kurzvorstellungen aktueller Forschung)
Diskussionskreis Fehlertoleranz, Berlin
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