Practicals & Theses

List of practicals and theses at the Embedded Computing Systems Group (E191/2)

Details for Efficient Interfacing Between Timing Domains

Within a closed timing domain the setup/hold requirements of all stateful elements can be safely met. Examples are a globally synchronous clock domain or an asynchronous handshake domain. Often it is, however, necessary to exchange signals between two (or more) such timing domains, which inevidently leads to metastability problems at the interfaces.
Your task will be to compile and compare existing solutions for this problem (assumptions, overheads, throughput, upset rate,...), using analytic models and analog simulations. The whole matrix of interfaces between synchronous systems, bounded delay systems and delay insensitive systems shall be covered, considering the diverse levels of synchrony (mesochronous, plesiochronous) and the asynchropnous handshake protocols (2-phase, 4-phase). Where required, new solutions shall be developed, and existing ones be improved. Applicable tools for the proof of concept as well as the assessment of the solutions' properties are simulation and FPGA prototype implementation.

Description

Your task will be to compile and compare existing solutions for this problem (assumptions, overheads, throughput, upset rate,...), using analytic models and analog simulations. The whole matrix of interfaces between synchronous systems, bounded delay systems and delay insensitive systems shall be covered, considering the diverse levels of synchrony (mesochronous, plesiochronous) and the asynchropnous handshake protocols (2-phase, 4-phase). Where required, new solutions shall be developed, and existing ones be improved. Applicable tools for the proof of concept as well as the assessment of the solutions' properties are simulation and FPGA prototype implementation.

Required Skills

Digital Design (lecture and lab)
Advanced Digital Design

Supervisors

Dipl.-Ing. Dr.techn. Andreas STEININGER (main responsibility)
E-Mail:
Homepage: https://ti.tuwien.ac.at/ecs/people/steininger/view

Univ.Ass. Dipl.-Ing. Bakk.techn. Robert NAJVIRT
E-Mail:

Dipl.-Ing. Dr.techn. Thomas POLZER
E-Mail:

Types

Diplomarbeit

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