Publications

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Presentations

M Függer, J. Maier, R. Najvirt, T. Nowak, U. Schmid: A Faithful Binary Circuit Model with Adversarial Noise
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE'18), Dresden, Deutschland; in: Proceedings of the 2018 Design, Automation & Test in Europe (DATE), 2018, ISBN: 978-3-9819263-1-6, p. 1327 - 1332
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G. Tarawneh, M Függer, C. Lenzen: Metastability tolerant computing
23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017), San Diego, California; in: Proceedings 2017 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017), IEEE Computer Society, 10662 Los Vaqueros Circle (2017), ISBN: 978-1-5386-2749-5, p. 25 - 32
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M Függer, T. Nowak, M. Schwarz: Brief Announcement: Lower Bounds for Asymptotic Consensus in Dynamic Networks
31st International Symposium on Distributed Computing (DISC 2017), Wien; in: Leibniz International Proceedings in Informatics (LIPIcs), 2017, ISSN: 1868-8969; 3 pages
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M Függer, A. Kinali, C. Lenzen, T. Polzer: Metastability-aware memory-efficient time-to-digital converter
23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017), San Diego, California; in: Proceedings 2017 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017), IEEE Computer Society, 10662 Los Vaqueros Circle (2017), ISBN: 978-1-5386-2749-5, p. 49 - 56
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M. Shafique (invited): Approximate Computing across the Hardware and Software Stacks
Invited Talks at TU Eindhoven, TU Eindhoven, Netherlands
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M. Shafique (invited): Cross-Layer Approximate Computing: From Circuits to Applications
Invited Talks at University of Twente, University of Twente, Netherlands
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B. Fritz, V. S. Veeravalli, A. Steininger, V. Simek: Setup for an Experimental Study of Radiation Effects in 65nm CMOS
20th Euromicro Conference on Digital System Design, Wien; in: Proceedings of the 20th Euromicro Conference on Digital System Design, 2017, p. 329 - 336
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M. Andjelkovic, M. Krstic, R. Kraemer, V. S. Veeravalli, A. Steininger: A Critical Charge Model for Estimating the SET and SEU Sensitivity: A Muller C-Element Case Study
The 26th IEEE Asian Test Symposium (ATS´17), Taipei, Taiwan; in: Proceedings of the 26th IEEE Asian Test Symposium (ATS´17), 2017, p. 1 - 6
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M. Shafique: Low-Power Computing and Emerging Trends
CPS Summer School 2017, Porto Conte Ricerche, Alghero, Italy
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M. Shafique: Robust Heterogeneous Computing for CPS
CPS Summer School 2017, Porto Contr Ricerche, Alghero, Italy
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M. Shafique (invited): Enabling Extreme Energy-Efficiency through Brain-Inspired Computing Trends: From Approximate to Neural Processing
15th International Conference On Frontiers of Information Technology (FIT'17), Islamabad, Pakistan; in: 15th International Conference On Frontiers of Information Technology (FIT'17), 2017
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M. Shafique (invited): Emerging Brain-Inspired Computing Trends: From Approximate Computing to Neural Processing
International Conference On Latest Trends in Electrical Engineering and Computing Technologies (INTELLECT'17), Karachi, Pakistan; in: International Conference On Latest Trends in Electrical Engineering and Computing Technologies (INTELLECT'17), 2017
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M. Shafique, R. Hafiz, M. Javed, S. Abbas, L. Sekanina, Z. Vasicek, V. Mrazek: Adaptive and Energy-Efficient Architectures for Machine Learning: Challenges, Opportunities, and Research Roadmap
2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI'17), 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI'17); in: Proceedings of 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI'17), IEEE, 2017, ISSN: 2159-3477, p. 617 - 632
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H. Lee, M. Shafique, M. Al Faruque: Low-overhead Aging-aware Resource Management on Embedded GPUs
2017 ACM/EDAC/IEEE 54th Design Automation Conference (DAC'17), Austin, Texas, USA; in: Proceedings of the 54th Annual Design Automation Conference (DAC) 2017, ACM, 2017, ISBN: 978-1-4503-4927-7, p. 67:1 - 67:6
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M. Hanif, R. Hafiz, O. Hasan, M. Shafique: QuAd: Design and Analysis of Quality-Area Optimal Low-Latency Approximate Adders
2017 ACM/EDAC/IEEE 54th Design Automation Conference (DAC'17), Austin, Texas, USA; in: Proceedings of the 54th Annual Design Automation Conference (DAC) 2017, ACM, 2017, ISBN: 978-1-4503-4927-7, p. 42:1 - 42:6
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M. Ayub, O. Hasan, M. Shafique: Statistical Error Analysis for Low Power Approximate Adders
2017 ACM/EDAC/IEEE 54th Design Automation Conference (DAC'17), Austin, Texas, USA; in: Proceedings of the 54th Annual Design Automation Conference (DAC) 2017, ACM, 2017, ISBN: 978-1-4503-4927-7, p. 75:1 - 75:6
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D. Ratasich, O. Hoftberger, H. Isakovic, M. Shafique, R. Grosu: A Self-Healing Framework for Building Resilient Cyber-Physical Systems
20th IEEE International Symposium on Real-Time Computing (ISORC 2017), Toronto, Canada; in: Proc. 20th IEEE International Symposium on Real-Time Computing (ISORC 2017), IEEE, 2017, ISSN: 2375-5261, p. 133 - 140
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W. El-Harouni, S. Rehman, B. Prabakaran, A. Kumar, R. Hafiz, M. Shafique: Embracing Approximate Computing for Energy-Efficient Motion Estimation in High Efficiency Video Coding
2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE'17), Lausanne, Switzerland; in: Proceedings of the 2017 Design, Automation & Test in Europe (DATE), IEEE, 2017, ISSN: 1558-1101, p. 1384 - 1389
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A. Subramaniyan, S. Rehman, M. Shafique, A. Kumar, J. Henkel: Soft Error-Aware Architectural Exploration for Designing Reliability Adaptive Cache Hierarchies in Multi-Cores
2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE'17), Lausanne, Switzerland; in: Proceedings of the 2017 Design, Automation & Test in Europe (DATE), IEEE, 2017, ISSN: 1558-1101, p. 37 - 42
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A. Pathania, K. Khdr, M. Shafique, T. Mitra, J. Henkel: Scalable Probabilistic Power Budgeting for Many-Cores
2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE'17), Lausanne, Switzerland; in: Proceedings of the 2017 Design, Automation & Test in Europe (DATE), IEEE, 2017, ISSN: 1558-1101, p. 864 - 869
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S. Bukhari, F. Lodhi, O. Hasan, M. Shafique, J. Henkel: CAnDy-TM: Comparative Analysis of Dynamic Thermal Management in Many-Cores using Model Checking
2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE'17), Lausanne, Switzerland; in: Proceedings of the 2017 Design, Automation & Test in Europe (DATE), IEEE, 2017, ISSN: 1558-1101, p. 1289 - 1292
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A. Chattopadhyay, A. Prakash, M. Shafique: Secure Cyber-Physical Systems: Current Trends, Tools and Open Research Problems
2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE'17), Lausanne, Switzerland; in: Proceedings of the 2017 Design, Automation & Test in Europe (DATE), IEEE, 2017, ISSN: 1558-1101, p. 1104 - 1109
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M. Zeiner, U. Schmid, M. Schwarz: On Linear-Time Data Dissemination in Dynamic Rooted Trees
19th ÖMG Congress and Annual DMV Meeting, Salzburg; in: 19th ÖMG Congress and Annual DMV Meetig Program and Books of Abstracts, 2017, p. 87
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B. Aminof, S. Rubin, I. Stoilkovska, J. Widder, F. Zuleger: Parameterized Model Checking of Synchronous Distributed Algorithms by Abstraction
Verification, Model Checking, and Abstract Interpretation (VMCAI), Los Angeles; in: VMCAI, LNCS/Springer, 10747 (2018), p. 1 - 24
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T. Polzer, F. Huemer, A. Steininger: Measuring Metastability Using a Time-to-Digital Converter
20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Dresden; in: Proceedings 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, IEEE Service Center, 2017, ISBN: 978-1-5386-0471-7; 6 pages
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R. Najvirt, T. Polzer, A. Steininger: Measuring Metastability with Free-Running Clocks
23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017), San Diego, California; in: Proceedings 2017 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017), IEEE Computer Society, 10662 Los Vaqueros Circle (2017), ISBN: 978-1-5386-2749-5; 7 pages
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R. Kuznets (invited): The Byzantine Mind
Seminar Logic and Theoretical Computer Science, University of Bern (2017), Bern
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D. Ratasich, O. Höftberger, H. Isakovic, M. Shafique, R. Grosu: A Self-Healing Framework for Building Resilient Cyber-Physical Systems
20th IEEE International Symposium on Real-Time Computing (ISORC 2017), Toronto, Canada; in: Real-Time Distributed Computing (ISORC), 2017 IEEE 20th International Symposium on, IEEE, 2017, ISBN: 978-1-5386-1574-4, p. 133 - 140
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A. Kinali, F. Huemer, C. Lenzen: Fault-tolerant Clock Synchronization with High Precision
2016 IEEE Computer Society Annual Symposium on VLSI, Pittsburgh, PA, USA; in: Proc. 2016 IEEE Computer Society Annual Symposium on VLSI, 2016, p. 490 - 495
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T. Polzer, A. Steininger: A General Approach for Comparing Metastable Behavior of Digital CMOS Gates
19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Kosice, Slovakia; in: Proc 19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2016, ISBN: 978-1-5090-2467-4; 6 pages
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S. Varadan, A. Steininger: Study of a Delayed Single-Event Effect in the Muller C-element
21st IEEE European Test Symposium, Amsterdam; in: Proc 21st IEEE European Test Symposium, 2016, ISBN: 978-1-4673-9659-2
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S. Varadan, A. Steininger: Design and Physical Implementation of a Target ASIC for SET Experiments
2016 Euromicro Conference on Digital System Design (DSD), Limassol, Portugal; in: Proc. 2016 Euromicro Conference on Digital System Design (DSD), IEEE, 2016, ISBN: 978-1-5090-2817-7, p. 694 - 697
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T. Polzer, F. Huemer, A. Steininger: A Programmable Delay Line for Metastability Characterization in FPGAs
24th Austrian Workshop on Microelectronics (Austrochip), Villach; in: Proceedings 24th Austrian Workshop on Microelectronics, 2016; 6 pages
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I. Konnov, J. Widder, F. Spegni, L. Spalazzi: Accuracy of Message Counting Abstraction in Fault-Tolerant Distributed Algorithms
Verification, Model Checking, and Abstract Interpretation (VMCAI), Paris; in: VMCAI 2017: Verification, Model Checking, and Abstract Interpretation, Springer, LNCS/10145/Paris (2017), ISBN: 978-3-319-52233-3, p. 347 - 366
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I. Konnov, M. Lazić, V. Veith, J. Widder: A short counterexample property for safety and liveness verification of fault-tolerant distributed algorithms
44th ACM SIGPLAN Symposium on Principles of Programming Languages (POPL), Paris, France; in: POPL, ACM, Paris (2017), ISBN: 978-1-4503-4660-3, p. 719 - 734
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F. Huemer, J. Lechner, A. Steininger: A New Coding Scheme for Fault Tolerant 4-Phase Delay-Insensitive Codes
2016 IEEE International Conference on Computer Design, Phoenix, Arizona, USA; in: Proceedings 2016 IEEE International Conference on Computer Design, 2016, ISBN: 978-1-5090-5142-7, p. 392 - 395
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P. Bogdan, P. Pande, H. Amrouch, M. Shafique, J. Henkel (invited): Power and Thermal Management in Massive Multicore Chips: Theoretical Foundation meets Architectural Innovation and Resource Allocation
International Conference on Compilers, Architecture and Synthesis for Embedded Systems [CASES 07], Pittsburgh, Pennsylvania, USA; in: CASES, ACM, 2016, ISBN: 978-1-4503-4482-1
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S. Rehman, W. El-Harouni, M. Shafique, A. Kumar, J. Henkel: Architectural-Space Exploration of Approximate Multipliers
The IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Austin, TX, USA; in: ICCAD, ACM New York, NY, USA, 2016, ISBN: 978-1-4503-4466-1
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A. Steininger, R. Najvirt, J. Maier: Does Cascading Schmitt-Trigger Stages Improve the Metastable Behavior?
2016 Euromicro Conference on Digital System Design (DSD), Limassol, Portugal; in: 2016 Euromicro Conference on Digital System Design (DSD), IEEE, 2016, ISBN: 978-1-5090-2817-7, p. 372 - 379
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A. Steininger, J. Maier, R. Najvirt: The Metastable Behavior of a Schmitt-Trigger
22nd IEEE International Symposium on Asynchronous Circuits and Systems, Porto Alegre -- Brazil; in: 2016 22nd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), IEEE Computer Society Conference Publishing Services (CPS), 2016, ISBN: 978-1-4673-9007-1, p. 57 - 64
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M. Lazić, I. Konnov, V. Veith, J. Widder (invited): Model Checking of Threshold-based Fault-Tolerant Distributed Algorithms
7th Workshop on Program Semantics, Specification and Verification: Theory and Applications, St. Petersburg, Russia
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I. Konnov, M. Lazić, V. Veith, J. Widder: Parameterized Verification of Liveness of Distributed Algorithms
Workshop on Formal Reasoning in Distributed Algorithms (FRiDA), Marrakech, Marocco
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U. Schmid (invited): Reconciling Fault-Tolerance and Robustness ?
Workshop on Design and Analysis of Robust Systems @ CPS-Week 2016, Hofburg Vienna, Austria
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U. Schmid (invited): Easy Impossibility Proofs for k-Set Agreement
Dagstuhl Seminar #16282 Topological Methods in Distributed Computing, Schloss Dagstuhl--Leibniz-Zentrum fuer Informatik
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D. Pfleger, U. Schmid: A Framework for Connectivity Monitoring in Wireless Sensor Networks
10th International Conference on Sensor Technlogies and Applications (SENSORCOMM'16), Nice, France; in: Proceedings 10th International Conference on Sensor Technlogies and Applications (SENSORCOMM'16), IARIA XPS Press, 2016, ISBN: 978-1-61208-490-9, p. 40 - 48
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B. Charron-Bost, M Függer, T. Nowak: Fast, Robust, Quantizable Approximate Consensus
International Colloquium on Automata, Languages and Programming (ICALP), Rome, Italy; in: Proceedings 43rd International Colloquium on Automata, Languages, and Programming (ICALP'16), Leibniz International Proceedings in Informatics (LIPIcs), 2016, ISBN: 978-3-95977-013-2, p. 1 - 14
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M. Schwarz, K. Winkler, U. Schmid: Fast Consensus Under Eventually Stabilizing Message Adversaries
17th International Conference on Distributed Computing and Networking, Singapore; in: Proceedings of the 17th International Conference on Distributed Computing and Networking, ACM, 2016, ISBN: 978-1-4503-4032-8, p. 1 - 10
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I. Konnov, V. Veith, J. Widder (invited): What You Always Wanted to Know About Model Checking of Fault-Tolerant Distributed Algorithms
Perspectives of System Informatics: 10th International Andrei Ershov Informatics Conference, Kazan, Russland; in: Perspectives of System Informatics: 10th International Andrei Ershov Informatics Conference, PSI 2015, LNCS / Springer, 9609 (2016), p. 6 - 21
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M. Zeiner, M. Schwarz, K. Winkler, U. Schmid: Broadcasting in Random Trees
ALEA in Europe - Young Researchers Workshop, TU Wien
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R. Najvirt, A. Steininger: A Versatile and Reliable Glitch Filter for Clocks
25th International Workshop on Power and Timing Modeling, Optimization and Simulation, Salvador, Brasilien; in: 25th International Workshop on Power and Timing Modeling, Optimization and Simulation, 2015; 8 pages
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S. Varadan, A. Steininger: Can we trust SET Injection Models?
MEDIAN Finale Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale, Tallinn, Estonia; in: MEDIAN Finale Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale, 2015; 6 pages
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J. Lechner, A. Steininger, F. Huemer: Methods for Analysing and Improving the Fault Resilience of Delay-Insensitive Codes
33rd IEEE International Conference on Computer Design, New York City, USA; in: 33rd IEEE International Conference on Computer Design, 2015; 8 pages
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R. Najvirt, A. Steininger: A Pausible Clock with Crystal Oscillator Accuracy
22nd European Conference on Circuit Theory and Design, Trondheium, Norwegen; in: 22nd European Conference on Circuit Theory and Design, 2015; 4 pages
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S. Varadan, A. Steininger: Reliable and Continuous Measurement of SET Pulse Widths
18th Euromicro Conference on Digital System Design, Funchal, Portugal; in: 18th Euromicro Conference on Digital System Design, 2015; 8 pages
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T. Polzer, A. Steininger: Enhanced Metastability Characterization based on AC Analysis
18th Euromicro Conference on Digital System Design, Funchal, Portugal; in: 18th Euromicro Conference on Digital System Design, 2015; 9 pages
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T. Polzer, A. Steininger: Measuring the Distribution of Metastable Upsets over Time
18th Euromicro Conference on Digital System Design, Funchal, Portugal; in: Measuring the Distribution of Metastable Upsets over Time, 2015; 8 pages
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R. Najvirt, T. Polzer, F. Beck, A. Steininger: Containment of Metastable Voltages in FPGAs
18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Belgrad; in: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2015; 6 pages
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F. Huemer, M. Schütz, A. Steininger: Revisiting Sorting Network based Completion Detection for 4 Phase Delay Insensitive Codes
Austrochip Workshop on Microelectronics, Wien; in: Austrochip Workshop on Microelectronics, 2015; 6 pages
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M. Schütz, F. Huemer, A. Steininger: A Practical Comparison of 2-Phase Delay Insensitve Communication Protocols
Austrochip Workshop on Microelectronics, Wien; in: Austrochip Workshop on Microelectronics, 2015; 6 pages
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R. Najvirt, A. Steininger: How to Synchronize a Pausible Clock to a Reference
21st IEEE International Symposium on Asynchronous Circuits and Systems, Mountain View, CA; in: 21st IEEE International Symposium on Asynchronous Circuits and Systems, 2015; 8 pages
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R. Najvirt, M Függer, T. Nowak, U. Schmid, M. Hofbauer, K. Schweiger: Experimental Validation of a Faithful Binary Circuit Model
Great Lakes Symposium on VLSI (GLSVLSI'15), Pittsburgh, Pennsylvania, USA; in: Proceedings of the 25th Edition on Great Lakes Symposium on VLSI (GLSVLSI'15), 2015, ISBN: 978-1-4503-3474-7, p. 355 - 360
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M Függer, R. Najvirt, T. Nowak, U. Schmid: Towards binary circuit models that faithfully capture physical solvability
Design, Automation & Test in Europe Conference & Exhibition (DATE'15), Grenoble, France; in: Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE'15), 2015, ISBN: 978-3-9815370-4-8, p. 1455 - 1460
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M. Biely, P. Robinson, U. Schmid, M. Schwarz, K. Winkler: Gracefully Degrading Consensus and k-Set Agreement in Directed Dynamic Networks
The international Conference on NETworked sYStems, Agadir, Marokko; in: NETYS2015, Springer LNCS, 9466 (2015), ISBN: 978-3-319-26849-1
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I. Konnov, V. Veith, J. Widder: SMT and POR beat Counter Abstraction: Parameterized Model Checking of Threshold-Based Distributed Algorithms
International Conference on Computer Aided Verification (CAV), San Francisco, CA, USA; in: Computer Aided Verification, LNCS Springer, 9206 (2015), ISBN: 978-3-319-21689-8, p. 85 - 102
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M. Zeiner, M Függer, T. Nowak, U. Schmid: Optimal Strategies for Repeated Leader Election
Joint Austrian-Hungarian Mathematical Conference 2015, Györ
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A. Pavlogiannis, K. Chatterjee, U. Schmid, A. Kößler: A Framework for Automated Competitive Analysis of On-line Scheduling of Firm-Deadline Tasks
35th IEEE Real-Time Systems Symposium, Rome; in: Proccedings IEEE Real-Time Systems Symposium (RTSS'14), 2014, ISSN: 1052-8725, p. 118 - 127
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M. Schwarz, K. Winkler, U. Schmid, M. Biely, P. Robinson: Brief Announcement: Gracefully Degrading Consensus and k-Set Agreement under Dynamic Link Failures
33th ACM SIGACTSIGOPS Symposium on Principles of Distributed Computing (PODC), Paris, France; in: Proceedings of the 33th ACM SIGACTSIGOPS Symposium on Principles of Distributed Computing, ACM, 2014, p. 341 - 343
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R. Najvirt, A. Steininger: Equivalence of Clock Gating and Synchronization with Applicability to GALS Communication
24th International Workshop on Power and Timing Modeling, Optimization and Simulation, Isles Balears, Spain; in: Proceedings of the 24th International Workshop on Power and Timing Modeling, Optimization and Simulation, IEEE, 2014, ISBN: 978-1-4799-5412-4; 8 pages
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A. Steininger, S. Varadan, D. Alexandrescu, E. Costenaro, L. Anghel: Exploring the State Dependent SET Sensitivity of Asynchronous Logic - The Muller-Pipeline Example
2014 32nd IEEE International Conference on Computer Design (ICCD), Seoul, Korea; in: Proceedings of the 2014 32nd IEEE International Conference on Computer Design (ICCD), IEEE, 2014, ISBN: 978-1-4799-6492-5; 7 pages
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S. Varadan, A. Steininger: Long Term On-Chip Monitoring of SET Pulsewidths in a Fully Digital ASIC
22nd Austrian Workshop on Microelectronics, Graz; in: Proceedings of the 22nd Austrian Workshop on Micorelectronics, IEEE, 2014, ISBN: 978-1-4799-7243-2; 6 pages
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S. Naqvi, A. Steininger: A Tree Arbiter Cell for High Speed Resource Sharing in Asynchronous Environments
Design Automation &Test in Europe Conference and Exhibition 2014 (DATE 14), Dresden, Deutschland; in: Proceedings Design Automation &Test in Europe, 2014, ISBN: 978-3-9815370-2-4; 6 pages
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J. Maier, A. Steininger: Online Test Vector Insertion: A Concurrent Built-In Self-Testing (CBIST) Approach for Asynchronous Logic
17th Symposium on Design and Diagnosis of Electronic Circuits and Systems (DDECS 2014), Warschau, Polen; in: Design and Diagnostics of Electronic Circuits Systems (DDECS), 2014 IEEE 17th International Symposium on, 2014; 6 pages
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L. Anghel, S. Varadan, D. Alexandrescu, A. Steininger, K. Schneider, E. Costenaro: Single Event Effects in Muller C-Elements and Asynchronous Circuits Over a Wide Energy Spectrum
2014 IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE 10), Stanford University, USA; in: Proceedings 2014 IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE 10), 2014; 6 pages
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S. Varadan, A. Steininger: Diagnosis of SET Propagation in Combinational Logic under Dynamic Operation
2014 IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE 10), Stanford University, USA; in: Proceedings 2014 IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE 10), 2014; 6 pages
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S. Varadan, A. Steininger: Architecture for Monitoring SET Propagation in 16-bit Sklansky Adder
15th International Symposium & Exhibit on Quality Electronic Design, Santa Clara, USA; in: Proceedings 15th International Symposium & Exhibit on Quality Electronic Design, 2014, ISBN: 978-1-4799-3946-6; 8 pages
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S. Varadan, A. Steininger, U. Schmid: Measuring SET Pulsewidths in Logic Gates using Digital Infrastructure
15th International Symposium & Exhibit on Quality Electronic Design, Santa Clara, USA; in: Proceedings 15th International Symposium & Exhibit on Quality Electronic Design, 2014, ISBN: 978-1-4799-3946-6; 7 pages
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S. Naqvi, J. Lechner, A. Steininger: Protection of Muller-Pipelines from Transient Faults
15th International Symposium & Exhibit on Quality Electronic Design, Santa Clara, USA; in: Proceedings 15th International Symposium & Exhibit on Quality Electronic Design, 2014, ISBN: 978-1-4799-3946-6; 9 pages
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M. Hofbauer, K. Schweiger, W. Gaberl, H. Zimmermann, U. Giesen, F. Langner, U. Schmid, A. Steininger: Single Event Transient Pulse Shape Measurements by On-chip Sense Amplifiers in a Single Inverter for Intermediate Input States under Alpha Particle Irradiation
IEEE Nuclear and Space Radiation Effects Conference (NSREC), San Francisco, California (USA)
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K. Chatterjee, A. Kößler, U. Schmid: Automated Analysis of Real-Time Scheduling using Graph Games
ACM International Conference on Hybrid Systems: Computation and Control, Philadelphia, USA; in: Proceedings 16th ACM International Conference on Hybrid Systems: Computation and Control (HSCC'13), ACM, 2013, p. 163 - 172
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T. Polzer, A. Steininger: Digital Late-Transition Metastability Simulation Model
16th Euromicro Conference on Digital System Design (DSD 2013), Santander; in: Proceedings of the 16th Euromicro Conference on Digital System Design, 2013; 8 pages
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T. Polzer, A. Steininger: SET Propagation in Micropipelines
23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS2013), Karlsruhe; in: 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS2013), 2013; 8 pages
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T. Polzer, A. Steininger: Metastability Characterization for Muller C-Elements
23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS2013), Karlsruhe; in: 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS2013), 2013; 8 pages
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T. Polzer, A. Steininger: An Approach for Efficient Metastability Characterization of FPGAs through the Designer
19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2013), Santa Monica, CA; in: 19th IEEE International Symposium on Asynchronous Circuits and Systems, 2013, ISSN: 1522-8681; 9 pages
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S. Naqvi, R. Najvirt, A. Steininger: A Multi-Credit Flow Control Scheme for Asynchronous NoCs
16th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, Karoly Vary, Czech Republic; in: Proc. 16th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2013; 6 pages
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R. Najvirt, S. Naqvi, A. Steininger: Classifying Virtual Channel Access Control Schemes for Asynchronous NoCs
19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2013), Santa Monica, CA; in: Asynchronous Circuits and Systems (ASYNC), 2013 IEEE 19th International Symposium on, 2013, ISSN: 1522-8681; 9 pages
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S. Varadan, A. Steininger: Performance of Radiation Hardening Techniques under Voltage and Temperature Variations
2013 IEEE Aerospace Conference, Big Sky, Montana, USA; in: Proc. 2013 IEEE Aerospace Conference, 2013; 6 pages
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R. Najvirt, S. Varadan, A. Steininger: Particle Strikes in C-Gates: Relevance of SET Shapes
2nd Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale, Avignon; in: Proceedings of the MEDIAN Workshop 2013, 2013; 4 pages
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S. Resch, A. Steininger, C. Scherrer: Software Composability and Mixed Criticality for Triple Modular Redundant Architectures
SASSUR Workshop 2013, Toulouse; in: Proceedings of the 2013 SASSUR Workshop, 2013; 4 pages
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S. Naqvi, A. Steininger, J. Lechner: An SET Tolerant Tree Arbiter Cell
19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2013), Santa Monica, CA; in: Asynchronous Circuits and Systems (ASYNC), 2013 IEEE 19th International Symposium on, 2013, ISSN: 1522-8681; 9 pages
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M. Zeiner, M Függer, U. Schmid, A. Kößler, T. Nowak: The Effect of Forgetting on the Performance of a Synchronizer
18th ÖMG Congress and Annual DMV Meeting, Innsbruck
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D. Dolev, M Függer, M. Hofstätter, C. Lenzen, M. Perner, M. Posch, U. Schmid, M. Sigl, A. Steininger: FATAL+HEX: Fault-Tolerant Self-Stabilizing Clock Generation+Distribution
Poster Session at the CSAIL Industry Affiliates Program (CSAIL-IAP) Annual Meeting, Cambridge, MA, USA
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M Függer, T. Nowak, U. Schmid: Unfaithful Glitch Propagation in existing Binary Circuit Models
19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2013), Santa Monica, CA; in: Asynchronous Circuits and Systems (ASYNC), 2013 IEEE 19th International Symposium on, 2013, ISSN: 1522-8681, p. 191 - 199
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B. Charron-Bost, M Függer, T. Nowak: Transience Bounds for Distributed Algorithms
11th International Conference on Formal Modeling and Analysis of Timed Systems (FORMATS 2013), Buenos Aires, Argentina; in: Formal Modeling and Analysis of Timed Systems, Lecture Notes in Computer Science, 8053 (2013), ISBN: 978-3-642-40228-9, p. 77 - 90
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C. Lenzen, M Függer, M. Hofstätter, U. Schmid: Efficient Construction of Global Time in SoCs despite Arbitrary Faults
16th Euromicro Conference on Digital System Design (DSD 2013), Santander, Spain; in: Dependable, Digital System Design (DSD), 2013 Euromicro Conference on, 2013, p. 142 - 151
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M. Perner, U. Schmid, C. Lenzen, M. Sigl: Byzantine Self-Stabilizing Clock Distribution with HEX: Implementation, Simulation, Clock Multiplication
DEPEND 2013, The Sixth International Conference on Dependability, Barcelona, Spain; in: Proceedings of the 6th IARA International Conference on Dependability (DEPEND'13), IARA, 2013, ISBN: 978-1-61208-301-8, p. 6 - 15
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M Függer, A. Kößler, T. Nowak, U. Schmid, M. Zeiner: The Effect of Forgetting on the Performance of a Synchronizer
ALGOSENSORS 2013 (9th International Symposium on Algorithms and Experiments for Sensor Systems, Wireless Networks and Distributed Robotics), Sophia Antipolis, France; in: Algorithms for Sensor Systems, 2013, p. 185 - 200
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D. Dolev, C. Lenzen, M Függer, U. Schmid, M. Perner: HEX: Scaling Honeycombs is Easier than Scaling Clock Trees
SPAA '13, Montreal, Canada; in: Proceedings of the 25th ACM symposium on Parallelism in Algorithms and Architectures, ACM, 2013, ISBN: 978-1-4503-1572-2, p. 164 - 175
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A. John, I. Konnov, U. Schmid, V. Veith, J. Widder: Brief announcement: parameterized model checking of fault-tolerant distributed algorithms by abstraction
ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing (PODC), Montreal, Kanada; in: PODC, ACM, 2013, ISBN: 978-1-4503-2065-8, p. 119 - 121
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A. John, I. Konnov, U. Schmid, V. Veith, J. Widder: Parameterized model checking of fault-tolerant distributed algorithms by abstraction
International Conference on Formal Methods in Computer-Aided Design (FMCAD), Portland, OR, USA; in: FMCAD, 2013, ISBN: 978-0-9835678-3-7, p. 201 - 209
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A. John, I. Konnov, U. Schmid, V. Veith, J. Widder: Towards Modeling and Model Checking Fault-Tolerant Distributed Algorithms
International SPIN Symposium on Model Checking of Software (SPIN), Stony Brook, NY, USA; in: SPIN, LNCS, Springer, 7976 (2013), ISBN: 978-3-642-39175-0, p. 209 - 226
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P. Milbredt, M. Glass, M. Lukasiewycz, A. Steininger, J. Teich: Designing FlexRay-based Automotive Architectures: A Holistic OEM Approach
Design, Automation & Test in Europe Conference & Exhibition (DATE 2012), Dresden, Germany; in: Design, Automation & Test in Europe Conference & Exhibition (DATE 2012) Proceedings, EDAA, 2012, ISBN: 978-3-9810801-8-6, p. 276 - 279
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S. Varadan, A. Steininger: Efficient Radiation-Hardening of a Muller C-Element
2012 Single Event Effects Symposium (SEE 2012), San Diego, USA; in: 2012 Single Event Effects Symposium, 2012
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S. Varadan, A. Steininger: LFSR Implementation Using C-Elements
MEMICS 2012, Znjomo, Czechia; in: MEMICS 2012, 2012, p. 73 - 83
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B. Fritz, S. Varadan, A. Steininger: Reliable Gateway for Radiation Experiments on a VLSI Chip
Austrochip 2012, Graz, Austria; in: Austrochip 2012, 2012, p. 65 - 70
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S. Varadan, A. Steininger: Radiation-Tolerant Combinational Gates - An Implementation Based Comparison
15th IEEE International Conference on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2012), Tallinn, Estonia; in: Design and Diagnostics of Electronic Circuits Systems (DDECS), 2012 IEEE 15th International Symposium on, 2012, p. 115 - 120
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S. Varadan, A. Steininger: Monitoring Single Event Transient Effects in Dynamic Mode
1st Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN 2012), Annecy, France; in: 1st Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN 2012), 2012, p. 51 - 54
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T. Reinbacher, J. Geist, P. Moosbrugger, M. Horauer, A. Steininger: Parallel Runtime Verification of Temporal Properties for Embedded Software
Mechatronics and Embedded Systems and Applications (MESA), 2012 IEEE/ASME International Conference on, Suzhou, China; in: Mechatronics and Embedded Systems and Applications (MESA), 2012 IEEE/ASME International Conference on, 2012, ISBN: 978-1-4673-2347-5, p. 224 - 231
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T. Reinbacher, M. Horauer, A. Steininger: A Runtime Verification Unit for Microcontrollers
System, Software, SoC and Silicon Debug Conference (S4D), 2012, Vienna, Austria; in: System, Software, SoC and Silicon Debug Conference (S4D), 2012, 2012, ISSN: 2114-3684, p. 1 - 6
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M. Hofbauer, K. Schweiger, H. Zimmermann, U. Giesen, F. Langner, U. Schmid, A. Steininger: Supply Voltage Dependent On-chip Single Event Transient Pulse Shape Measurements in 90 nm Bulk CMOS under Alpha Irradiation
21st European Conference on Radiation and its Effects on Components and Systems (RADECS'12), Biarritz, FRANCE; in: Proceedings 21st European Conference on Radiation and its Effects on Components and Systems (RADECS'12), 2012
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S. Varadan, A. Steininger, U. Schmid, T. Polzer: Architecture and Design Analysis of a Digital Single-Event Transient/Upset Measurement Chip
15th Euromicro Symposium on Digital System Design: Architectures, Methods and Tools (DSD 2012), Izmir, Turkey; in: Proceedings 15th Euromicro Symposium on Digital System Design: Architectures, Methods and Tools (DSD'12), 2012, p. 8 - 17
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D. Dolev, M Függer, C. Lenzen, U. Schmid (invited): Towards Self-stabilizing Byzantine Fault-Tolerant Clock Generation in Systems-on-Chip
NITRD Workshop, Baltimore, USA
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M. Biely, P. Robinson, U. Schmid: Agreement in Directed Dynamic Networks
19th International Colloquium on Structural Information and Communication Complexity (SIROCCO'12), Reykjavik, Iceland; in: Proceedings 19th International Colloquium on Structural Information and Communication Complexity (SIROCCO'12), 2012, p. 73 - 84
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J. Lechner, M. Lampacher: Protecting Pipelined Asynchronous Communication Channels Against Single Event Upsets
IEEE 30th International Conference on Computer Design (ICCD 2012), Montreal, Canada; in: Computer Design (ICCD), 2012 IEEE 30th International Conference on, 2012, ISSN: 1063-6404, p. 480 - 481
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J. Lechner, M. Lampacher, T. Polzer: A Robust Asynchronous Interfacing Scheme with Four-Phase Dual-Rail Coding
2012 International Conference on Application of Concurrency to System Design (ACSD 2012), Hamburg, Germany; in: Application of Concurrency to System Design (ACSD), 2012 12th International Conference on, 2012, ISSN: 1550-4808, p. 122 - 131
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J. Lechner: Designing Robust GALS Circuits with Triple Modular Redundancy
2012 European Dependable Computing Conference (EDCC 2012), Sibiu, Romania; in: Dependable Computing Conference (EDCC), 2012 Ninth European, 2012, p. 227 - 236
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T. Polzer, A. Steininger, J. Lechner: Muller C-Element Metastability Containment
International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2012, Newcastle upon Tyne; in: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, Lecture Notes in Computer Science, 7606 (2013), ISBN: 978-3-642-36156-2, p. 103 - 112
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S. Naqvi, S. Varadan, A. Steininger: Protecting an Asynchronous NoC against Transient Channel Faults
DSD 2012 (Euromicro Conference on Digital System Design), Cesme, Izmir, Turkey; in: Proc. of 15th Euromicro Conference on Digital System Design, 2012; 8 pages
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S. Naqvi: An Asynchronous Router Architecture using Four-Phase Bundled Handshake Protocol
ICCGI 2012 : The Seventh International Multi-Conference on Computing in the Global Information Technology, Venice, Italy; in: Proc. of The Seventh International Multi-Conference on Computing in the Global Information Technology, 2012, ISBN: 978-1-61208-202-8; 6 pages
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J. Lechner, R. Najvirt: A Generic Architecture for Robust Asynchronous Communication Links
International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2012, Newcastle upon Tyne; in: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, Lecture Notes in Computer Science, 7606 (2013), ISBN: 978-3-642-36156-2, p. 121 - 130
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T. Reinbacher, M Függer, J. Brauer: Real-Time Runtime Verification on Chip
RV 2012: the 3rd International Conference on Runtime Verification, Istanbul; in: Proc. of RV 2012: the 3rd International Conference on Runtime Verification, LNCS / Springer, 7687 (2012)
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M Függer, A. Kößler, T. Nowak, M. Zeiner: Brief Announcement: The Degrading Effect of Forgetting on a Synchronizer
14th International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2012), Toronto, Canada; in: Stabilization, Safety, and Security of Distributed Systems, Lecture Notes in Computer Science, 7596 (2012), ISBN: 978-3-642-33535-8, p. 90 - 91
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A. John, I. Konnov, U. Schmid, V. Veith, J. Widder: Who is afraid of Model Checking Distributed Algorithms?
PUMA/RISE Seminar, Goldegg
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A. John, I. Konnov, U. Schmid, V. Veith, J. Widder (invited): Parameterized Model Checking of Fault-tolerant Distributed Algorithms
Dagstuhl Seminar 12461: Games and Decisions for Rigorous Systems Engineering, Dagstuhl, Deutschland
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M Függer, J. Widder: Efficient Checking of Link-Reversal-Based Concurrent Systems
International Conference on Concurrency Theory (CONCUR), Newcaslte upon Tyne, UK; in: CONCUR 2012 - Concurrency Theory, Lecture Notes in Computer Science. Springer Verlag., 7454 (2012), ISBN: 978-3-642-32939-5, p. 486 - 499
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M. Hofbauer, K. Schweiger, H. Dietrich, H. Zimmermann, K.O. Voss, B Merk, U. Schmid, A. Steininger: Pulse Shape Measurements by On-chip Sense Amplifiers of Single Event Transients Propagating through a 90 nm Bulk CMOS Inverter Chain
Nuclear and Space Radiation Effects Conference (NSREC), Miami, FL, USA
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A. John, I. Konnov, U. Schmid, V. Veith, J. Widder: Counter Attack against Byzantine Generals
Alpine Verification Meeting, Passau, Bayern, Deutschland
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M Függer, J. Widder: On Efficient Checking of Link-reversal-based Concurrent Systems
PUMA/RISE Seminar, Traunkirchen
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M. Biely, P. Robinson, U. Schmid: Brief Announcement: Easy Impossibility Proofs for k-Set Agreement in Message Passing Systems
Proceedings of the 30th Annual ACM Symposium on Principles of Distributed Computing (PODC'11), San Jose; in: PODC'11, ACM, 2011, p. 227 - 228
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H. Moser, U. Schmid: Reconciling Fault-Tolerant Distributed Algorithms and Real-Time Computing
Structural Information and Communication Complexity, Gdansk; in: Proceedings 18th International Colloquium on Structural Information and Communication Complexity (SIROCCO'11), Springer Berlin / Heidelberg, 2011, ISBN: 978-3-642-22211-5, p. 42 - 53
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M. Biely, P. Robinson, U. Schmid: Solving k-Set Agreement with Stable Skeleton Graphs
International Parallel and Distributed Processing Symposium (IPDPS), Anachorage, Alaska; in: IPDPS Workshops, 2011, ISBN: 978-1-61284-425-1, p. 1488 - 1495
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M. Biely, P. Robinson, U. Schmid: Easy Impossibility Proofs for k-Set Agreement in Message Passing Systems
International Conference On Principles Of Distributed Systems (OPODIS), Toulouse; in: OPODIS'11, Springer Berlin / Heidelberg, 2011, p. 299 - 312
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T. Reinbacher, A. Steininger, T. Müller, M. Horauer, J. Brauer, S. Kowalewski: Hardware support for efficient testing of embedded software
The 7th ASME/IEEE International Conference on Mechatronic and Embedded Systems and Applications, Washington; in: International Conference on Mechatronic and Embedded Systems and Applications, ASME, 2011
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T. Reinbacher, J. Brauer, M. Horauer, A. Steininger, S. Kowalewski: Past time LTL runtime verification for microcontroller binary code
FMICS 2011, Trento; in: Formal Methods for Industrial Critical Systems, Springer Berlin / Heidelberg, 2011, ISBN: 978-3-642-24430-8, p. 37 - 51
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T. Reinbacher, J. Brauer, D. Schachinger, A. Steininger, S. Kowalewski: Automated test-trace inspection for microcontroller binary code
2nd International Conference on Runtime Verification (RV 2011), San Francisco; in: Runtime Verification, 2011, p. 239 - 244
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D. Dolev, M Függer, C. Lenzen, U. Schmid: Fault-Tolerant Algorithms for Tick-Generation in Asynchronous Logic: Robust Pulse Generation [Extended Abstract]
Stabilization, Safety, and Security of Distributed Systems, Grenoble, France; in: Stabilization, Safety, and Security of Distributed Systems, Springer Berlin / Heidelberg, 2011, ISBN: 978-3642051173, p. 163 - 177
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B. Charron-Bost, M Függer, L. Welch, J. Widder: Partial is Full
Structural Information and Communication Complexity, Gdansk; in: Structural Information and Communication Complexity, Springer Berlin / Heidelberg, 2011, ISBN: 978-3-642-22211-5, p. 113 - 124
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B. Charron-Bost, M Függer, L. Welch, J. Widder: Full Reversal Routing as a Linear Dynamical System
Structural Information and Communication Complexity, Gdansk; in: Structural Information and Communication Complexity, Springer Berlin / Heidelberg, 2011, ISBN: 978-3-642-22211-5, p. 101 - 112
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T. Nowak, M Függer, A. Kößler: On the Performance of a Retransmission-Based Synchronizer
Structural Information and Communication Complexity, Gdansk; in: Structural Information and Communication Complexity, Springer Berlin / Heidelberg, 2011, ISBN: 978-3-642-22211-5, p. 234 - 245
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B. Charron-Bost, M Függer, L. Welch, J. Widder: Brief announcement: full reversal routing as a linear dynamical system
SPAA '11, San Jose, California, USA; in: Proceedings of the 23rd ACM symposium on Parallelism in algorithms and architectures, ACM, 2011, ISBN: 978-1-4503-0743-7, p. 129 - 130
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M. Ferringer: Investigating the Impact of Process Variations on an Asynchronous Time-Triggered-Protocol Controller
Dependable Systems and Networks Workshops (DSN-W), 2011 IEEE/IFIP 41st International Conference on, Hong-Kong; in: Dependable Systems and Networks Workshops, 2011, ISBN: 978-1-4577-0374-4, p. 47 - 52
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M. Ferringer: Conversion and Interfacing Techniques for Asynchronous Circuits
14th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2011), Cottbus, Germany; in: Design and Diagnostics of Electronic Circuits & Systems, 2011, ISBN: 978-1-4244-9755-3, p. 11 - 16
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M. Ferringer: Conversion of Two- to Four-Phase Delay-Insensitive Asynchronous Circuits
EUROCON 2011, Lisbon; in: EUROCON - International Conference on Computer as a Tool (EUROCON), 2011 IEEE, 2011, ISBN: 978-1-4244-7486-8, p. 1 - 4
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A. Kößler: Challenges in Fault-Tolerant Distribiuted Real-Time Systems
RiSE Workshop TU Graz, Szentendre, Hungary
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M Függer (invited): Fault-Tolerant Distribiuted on-chip Algorithms
PUMA 2010, Szentendre, Hungary
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M Függer (invited): Fault-Tolerant Distribiuted on-chip Algorithms
RiSE GUGGING (IST AUSTRIA), Gugging (IST Austria)
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M Függer (invited): Fault-Tolerant Distribiuted on-chip Algorithms
FK 2010 (Forschungskooperation TU Wien - UNI Brno), Brno, Czech Republic
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U. Schmid (invited): Synchrony and Time in Fault-Tolerant Distribiuted Algorithms
FORMATS 2010 (Formal Modeling and Analysis of Times Systems), Klosterneuburg, Austria; in: Formal Modeling and Analysis of Timed Systems, Springer, 6246 (2010), ISBN: 9783642152962
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T. Reinbacher, J. Brauer, M. Horauer, A. Steininger, S. Kowalewski: Test-Case Generation for Embedded Binary Code Using Abstract Interpretation
MEMICS 2010 (Mathematical and Engineering Methods in Computer Science), Mikulov, Czech Republic; in: MEMICS proceedings, 2010, p. 151 - 158
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W. Friesenbichler, T. Panhofer, A. Steininger: Reliability Estimation and Experimental Results of a Self-Healing Asynchronous Circuit: A Case Study
NASA/ESA 2010 (Conference on Adaptive Hardware and Systems), Anaheim, CA, USA; in: NASA/ESA 2010 Proceedings, IEEE Computer Society, 2010, ISBN: 9781424458882, p. 97 - 104
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W. Friesenbichler, T. Panhofer, A. Steininger: Implementation of Self-Healing Asynchronous Circuits at the Example of a Video-Processing Algorithm
WSDN 2010 (4th Workshop on Dependable and Secure Nanocomputing, Chicago, IL, USA; in: WSDN - Full Program, IEEE Computer Socitey, 2010, ISBN: 9781424477289, p. 129 - 134
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W. Friesenbichler, T. Panhofer, A. Steininger: A Deterministic Approach for Hardware Fault Injection in Asynchronous QDI Logic
DDECS 2010 (Design and Diagnostics of Electronic Circuits and Systems), Vienna, Austria; in: 13th IEEE International Symposium On Design And Diagnostics Of Electronic Cicruits And Systems, IEEE, 2010, ISBN: 9781424466108, p. 317 - 322
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H. Chung, P. Robinson, L. Welch: Regional Consecutive Leader Election in Mobile Ad-Hoc Networks
ACM SIGACT/SIGMOBILE (International Workshop on FOUNDATIONS OF MOBILE COUMPUTING), Cambridge, Massachusetts, USA; in: Proceedings of the 6th International Workshop on Foundations of Mobile Computing, ACM, 2010, ISBN: 9781450304139, p. 81 - 90
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H. Chung, P. Robinson, L. Welch: Brief Announcement: Regional Consecutive Leader Election in Mobile Ad-Hoc Networks
ALGOSENSORS 2010 (6th International Workshop on Algorithmic Aspects of Wireless Sensor Networks), Bordeaux, France; in: Algorithms for Sensor Systems - LNCS, Springer, 6451/2010 (2010), ISBN: 9783642169878, p. 90 - 91
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A. Kößler, H. Moser, U. Schmid: Real-Time Analysis of Round-based Distributed Algorithms
RTSOPS 2010 (1st International Real-Time Scheduling Open Problems Seminar), Brussels, Belgium; in: Proceedings of the 1st International Real-Time Scheduling Open Problems Seminar, 2010, p. 9 - 11
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M. Ferringer: Investigating Self-Timed Circuits for the Time-Triggered Protocol
5th International Workshop on Reconfigurable Communication Centric System-on-Chips, Workshop Proceedings (ReCoSoC), Karlsruhe, Germany; in: Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip 2010, KIT Scientific Publishing - DFG, 2010, ISBN: 9783866445154, p. 101 - 108
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M. Ferringer: Towards self-timed logic in the Time-Triggered Protocol
DSN 2010 (International Conference on Dependable Systems and Networks), Chicago, IL, USA; in: DSN 2010 - Full Program, IEEE Computer Society, 2010, ISBN: 9781424477289, p. 136 - 141
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M Függer, A. Dielacher, U. Schmid: How to Speed-Up Fault-Tolerant Clock Generation in VLSI Systems-on-Chip via Pipelining
EDCC - 8 (European Dependable Computing Conference), Valencia, Spain; in: Proceedings of the Eight European Dependable Computing Conference, IEEE Computer Society, 2010, ISBN: 9780769540078, p. 230 - 239
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M. Jeitler, J. Lechner, A. Steininger: Enhancing Pipelined Processor Architectures with Fast Autonomous Recovery of Transient Faults
DDECS 2010 (Design and Diagnostics of Electronic Circuits and Systems), Vienna, Austria; in: 13th IEEE International Symposium On Design And Diagnostics Of Electronic Cicruits And Systems, IEEE Computer Society, 2010, ISBN: 9781424466108, p. 233 - 236
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M. Jeitler, J. Lechner: Low Latency Recovery from Transient Faults for Pipelined Processor Architectures
DSD 2010 (Euromicro Conference on Digital System Design), Lille, France; in: Proceedings DSD 2010 (Euromicro Conference on Digital System Design), IEEE Computer Society, 2010, ISBN: 9780769541716, p. 219 - 225
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M. Biely, M. Hutle: Consensus When All Processes May Be Byzantine for Some Time
11th International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2009), Lyon; in: Stabilization, Safety, and Security of Distributed Systems, Lecture Notes in Conputer Science / Springer Verlag, 5873 (2009), ISBN: 978-3-642-05117-3, p. 120 - 132
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G. Fuchs: Implications of VLSI Fault Models and Distributed Systems Failure Models --- A Hardware Designer's View
Dagstuhl Seminar 08371 : Fault-Tolerant Distributed Algorithms on VLSI Chips, Dagstuhl, Germany; in: Fault-Tolerant Distributed Algorithms on VLSI Chips, Leibniz Zentrum Informatik, 8371 (2009), ISSN: 1862-4405, p. ?
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M. Jeitler, J. Lechner: Speeding up Fault Injection for Asynchronous Logic by FPGA-based Emulation
ReConFig 2009 (International Conference on ReConFigurable Computing and FPGAs), Cancun, Quintana Roo, Mexico; in: ReConFig'09, CPS, 2009, ISBN: 9780769539171, p. 65 - 70
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M. Jeitler, J. Lechner: Comparing the Robustness of Synchronous and Asynchronous Circuits by Fault Injection
MEMICS 2009 (Mathematical and Engineering Methods in Computer Science), Znojmo; in: MEMICS 2009 proceedings, Universität Brno, 2009, ISBN: 9788087342046, p. 110 - 117
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M. Jeitler, M. Delvai, S. Reichör: Fuse - A Hardware Accelerated Hdl Fault Injection Tool
SPL 2009 (Southern Conference on Programmable Logic), Sao Carlos, Brazil; in: 2009, IEEE, 2009, ISBN: 9781424438464, p. 89 - 94
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B. Charron-Bost, S. Dolev, J. Ebergen, U. Schmid (invited): Fault Tolerant Distribiuted Algorithms and VLSI - An Appetizer
Dagstuhl Seminar 08371 : Fault-Tolerant Distributed Algorithms on VLSI Chips, Dagstuhl, Germany; in: Fault-Tolerant Distributed Algorithms on VLSI Chips, Leibniz Zentrum Informatik, 8371 (2009), ISSN: 1862-4405, p. ?
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A. Steininger (invited): Error Containment in the Presence of Metastability
Dagstuhl Seminar 08371 : Fault-Tolerant Distributed Algorithms on VLSI Chips, Dagstuhl, Germany; in: Fault-Tolerant Distributed Algorithms on VLSI Chips, Leibniz Zentrum Informatik, 8371 (2009), ISSN: 1862-4405, p. ?
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E. Armengaud, A. Steininger: Remote Measurement of Local Oscillator Drifts in FlexRay Networks
DATE 2009 (Design, Automation and Test in Europe), Nice, France; in: DATE09, Springer, 2009, ISBN: 9783981080155, p. 1082 - 1087
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P Tummeltshammer, A. Steininger: On the Risk of Fault Coupling over the Chip Substrate
DSD 2009 (Euromicro Conference on Digital System Design), Patras, Greece; in: 12th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN - Architectures, Methods and Tools - DSD2009, IEEE Computer Society, 2009, ISBN: 9780769537825, p. 325 - 332
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W. Friesenbichler, A. Steininger: Soft Error Tolerant Asynchronous Circuits based on Dual Redundant Four State Logic
DSD 2009 (Euromicro Conference on Digital System Design), Patras, Greece; in: 12th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN - Architectures, Methods and Tools - DSD 2009, IEEE Computer Society, 2009, ISBN: 9780769537825, p. 100 - 107
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M Függer, G. Fuchs, A. Steininger: On the Stability and Robustness of Non-Synchronous Circuits with Timing Loops
WSDN 2009 (Workshop on Dependable and Secure Nanocomputing, Estoril, Lisbon, Portugal; in: WSDN 2009, Springer, 2009, ISBN: 9781424444212, p. 45 - 50
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A. Dielacher, M Függer (invited): How to Speed-up Fault-tolerant Clock Generation in VLSI Systems-on-Chip via Pipelining
PODC 2009 (Principles of Distribiuted Computing), Alberta, Canada; in: PODC'09, ACM, 2009, ISBN: 9781605583969, p. 276 - 277
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G. Fuchs, M Függer, A. Steininger: On the Threat of Metastability in an Asynchronous Fault-Tolerant Clock Generation Scheme
ASYNC 2009 (International Symposium on Asynchronous Circuits and Systems), Chapel Hill, North Carolina; in: ASYNC 2009, IEEE Computer Society, 2009, ISSN: 1522-8681, p. 127 - 136
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P Tummeltshammer, A. Steininger: Power Supply Induced Common Cause Faults - Experimental Assessment of Potential Countermeasures
DSN 2009 (International Conference on Dependable Systems and Networks), Estoril, Portugal; in: DSN 2009 - Full Program, Springer, 2009, ISBN: 9781424444212, p. 449 - 457
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P Tummeltshammer, A. Steininger: On the Role of the Power Supply as an Entry for Common Cause Faults - An Experimental Analysis
DDECS 2009 (Design and Diagnostics of Electronic Circuits and Systems), Liberec, Czech Republic; in: 2009 IEEE Design and Diagnostics of Electronic Circuits and Systems, IEEE, 2009, ISBN: 9781424433414, p. 152 - 157
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M. Ferringer: Coupling Asynchronous Signals into Asynchronous Logic
Austrochip, Graz, Austria; in: Austrochip, Institut für Elektronik - TU Graz, 2009, ISBN: 978-3-9501635-1-3, p. 97 - 102
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B. Charron-Bost, L. Welch, J. Widder: Link Reversal: How to Play Better to Work Less
ALGOSENSORS 2009 (5th International Workshop on Algorithmic Aspects of Wireless Sensor Networks), Rhodes, Greece; in: Algorithmic Aspects of Wireless Sensor Networks, Springer, 5304/2008 (2009), ISBN: 9783642054334, p. 88 - 110
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B. Charron-Bost, A. Gaillard, L. Welch, J. Widder: Routing without Ordering
SPAA 2009 (Parallelism in Algorithms and Architectures), Calgary, Alberta, Canada; in: Proceedings of the Twenty-First Annual Symposium on Parallelism in Algorithms and Architectures, ACM, 2009, ISBN: 978-1-60558-606-9, p. 145 - 153
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M. Biely, P. Robinson, U. Schmid: Weak Synchrony Models and Failure Detectors for Message Passing (k-)Set Agreement
OPODIS 2009 (International Conference On Principles Of Distributed Systems), Nimes, France; in: LNCS Proceedings, Springer, 5923/2009 (2009), ISBN: 9783642108761, p. 285 - 299
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P. Robinson, M. Biely, U. Schmid: Brief Announcment: Weak Synchrony Models and Failure Detectors for Message Passing (k-)Set Agreement*
DISC 2009 (International Symposium on Distributed Computing), Elche, Spain; in: Distribiuted Computing, Springer, 5805/2009 (2009), ISBN: 978-3-642-04354-3, p. 360 - 361
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T. Polzer, T. Handl, A. Steininger: A Metastability-Free Multi-synchronous Communication Scheme for SoCs
SSS 2009 (Symposium on Stabilization, Safety, and Security of Distributed Systems), Lyon, France; in: Stabilization, Safety, and Security of Distribiuted Systems, Springer, 5873/2009 (2009), ISBN: 978-3642051173, p. 578 - 592
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M. Birner, T. Handl: ARROW - A Generic Hardware Fault Injection Tool for NoCs
DSD 2009 (Euromicro Conference on Digital System Design), Patras, Greece; in: 12th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN - Architectures, Methods and Tools - DSD 2009, IEEE Computer Society, 2009, ISBN: 978-0-7695-3782-5, p. 465 - 472
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E. Armengaud: Experimental Evaluation of the FlexRay Clock Synchronization Service
20. Workshop für Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Wien; in: 20. Workshop für Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2008, p. 85 - 89
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S. Hepp, G. Klima, A. Kadlec, L. Krammer, W. Luckner, D. Prokesch, S. Resch, A. Wasicek, J. Wilhelm, P Tummeltshammer, M. Delvai: Exploring Hardware Software Partitioning on the Example of a Fingerprint Verification System
16th Austrian Workshop on Microelectronics (Austrochip), Linz; in: Proc. of the 16th Austrian Workshop on Microelectronics 2008, 2008, p. 7 - 12
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H. Moser, U. Schmid: Optimal Deterministic Remote Clock Estimation in Real-Time Systems
12th International Conference On Principles of Distributed Systems, Luxor, Ägypten; in: Principles of Distributed Systems, Lecture Notes in Computer Science / Springer Verlag, Volume 5401 (2008), ISBN: 978-3-540-92220-9, p. 363 - 387
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J. Lechner, M. Delvai: Implementation of a Design Tool for Automated Generation of Four State Logic Circuits
Junior Scientist Conference 2008, Wien; in: Proceedings of the Junior Scientist Conference 2008, 2008, ISBN: 978-3-200-01612-5, p. 85 - 86
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G. Khyo, P. Puschner, M. Delvai: An Operating System for a Time-Predictable Computing Node
The 6th IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS 2008), Capri, Italien; in: Software Technologies for Embedded and Ubiquitous Systems, Lecture Notes in Computer Science / Springer Verlag, 5287 (2008), ISBN: 978-3-540-87784-4, p. 150 - 161
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T. Panhofer, W. Friesenbichler, M. Delvai: Fault Tolerant Four-State Logic by Using Self-Healing Cells
2008 IEEE International Conference on Computer Design, Lake Tahoe, CA, USA; in: 2008 IEEE International Conference on Computer Design, IEEE, 2008, ISBN: 978-1-4244-2658-4; 6 pages
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W. Friesenbichler, T. Panhofer, M. Delvai: Improving Fault Tolerance by Using Reconfigurable Asynchronous Circuits
11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, 2008, Bratislava, Slovakia; in: Design and Diagnostics of Electronic Circuits and Systems, 2008. DDECS 2008. 11th IEEE Workshop on, IEEE, 2008, ISBN: 978-1-4244-2276-0, p. 267 - 270
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K. Ambrosch, M. Humenberger, W. Kubinger, A. Steininger: Extending two non-parametric transforms for FPGA based stereo matching using bayer filtered cameras
IEEE Conference on Computer Vision and Pattern Recognition, 2008. CVPR '08, Anchorage, Alaska, USA; in: CVPR Workshops 2008. IEEE Computer Society Conference on Computer Vision and Pattern Recognition Workshops, 2008., 2008, ISBN: 978-1-4244-2339-2, p. 1 - 8
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P. Milbredt, A. Steininger, M. Horauer: Automated Testing of FlexRay Clusters for System Inconsistencies in Automotive Networks
IEEE International Workshop on Electronic Design, Test and Applications, Hong-Kong; in: 4th IEEE International Symposium on Electronic Design, Test and Applications, 2008. DELTA 2008., 2008, ISBN: 978-0-7695-3110-6, p. 533 - 538
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J. Grahsl, T. Handl, A. Steininger: Exploring the Usefulness of the Gate-level Stuck-at Fault Model for Muller C-Elements
20. GI/ITG/GMM Workshop Testmethoden und Vuverlässigkeit von Schaltungen und Systemen, Wien; in: 20. Workshop Testmethoden und Vuverlässigkeit von Schaltungen und Systemen, 2008, p. 165 - 169
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E. Armengaud, M Függer, A. Steininger: Safe deterministic replay for stimulating the clock synchronization algorithm in time-triggered systems
WFCS, Dresden, Germany; in: IEEE International Workshop on Factory Communication Systems, 2008. WFCS 2008., 2008, ISBN: 978-1-4244-2349-1, p. 277 - 286
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P. Milbredt, M. Horauer, A. Steininger: An Investigation of the Clique Problem in Flex Ray
SIES´2008 Third international symposium on industrial embedded systems, Montpellier - La Grande Motte, France; in: International Symposium on Industrial Embedded Systems, 2008., 2008, ISBN: 978-1-4244-1995-1, p. 200 - 207
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G. Fuchs, M Függer, U. Schmid, A. Steininger: Mapping a Fault-Tolerant Distributed Algorithm to Systems on Chip
11th EUROMICRO Conference on Digital System Design (DSD 2008), Parma, Italien; in: 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, DSD 2008., IEEE, 2008, ISBN: 978-0-7695-3277-6, p. 242 - 249
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U. Schmid (invited): Distributed Algorithms and VLSI
10 International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2008), Detroit, USA; in: Stabilization, Safety, and Security of Distributed Systems, Lecture Notes in Conputer Science / Springer Verlag, 5340 (2008), ISSN: 0302-9743, p. 3
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P. Robinson, U. Schmid: The Asynchronous Bounded Cycle Model
10 International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2008), Detroit, USA; in: Stabilization, Safety, and Security of Distributed Systems, Lecture Notes in Conputer Science / Springer Verlag, 5340 (2008), ISSN: 0302-9743, p. 246 - 262
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U. Schmid, P. Robinson: Brief Announcement: The Asynchronous Bounded Cycle Model
ACM Symposium on Principles of Distributed Computing, Toronto, Canada; in: PODC'08 Proceedings of the 27th Annual ACM Symposium on Principles of Distributed Computing, Association for Computing Machinery (ACM), 2008, ISBN: 978-1-59593-989-0, p. 423
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W. Forster, C. Kutschera, A. Steininger, K. Göschka: Automated Generation of Explicit Connectors for Component Based Hardware/Software Interaction in Embedded Real-Time Systems
16th International Workshop on Parallel and Distributed Real-Time Systems (WPDRTS 2008), (IPDPS 2008), Miami, Florida, USA; in: Proceedings of the 16th International Workshop on Parallel and Distributed Real-Time Systems (WPDRTS 2008), (IPDPS 2008), IEEE Computer Society, 2008, ISBN: 978-1-4244-1694-3, p. 1 - 8
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C. Trödhandl, B. Weiss: A Concept for Hybrid Fault Injection in Distributed Systems
Testing: Academic and Industrial Conference --- Practice and Research Techniques, Windsor, United Kingdom; in: Testing: Academic and Industrial Conference --- Practice and Research Techniques (Fast Abstracts), 2008
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U. Schmid (invited): A Perspective of Fault-Tolerant Clock Synchronization
2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication, Wien; in: IEEE Symposium on Precision Clock Synchronization for Measurement, Control and Communication, 2007
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E. Anceaume, C. Delporte-Gallet, H. Fauconnier, M. Hurfin, J. Widder: Clock Synchronization in the Byzantine-Recovery Failure Model
International Conference On Principles Of Distributed Systems (OPODIS), Guadeloupe; in: International Conference On Principles Of DIstributed System, 2007, p. 90 - 104
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K. Ambrosch, M. Humenberger, W. Kubinger, A. Steininger: Hardware Implementation of an SAD based stereo vision algorithm
Third IEEE Workshop on Embedded Computer Vision, Minneapolis; in: Proceedings of Third IEEE Workshop on Embedded Computer Vision, 2007
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M. Horauer, E. Armengaud, A. Steininger: Concepts and Tools for the Test of the Communication Sub-System of Time-Triggered Distributed Embedded Systems
International Conference on Design Engineering Technical Conferences & Computers and Information in Engineering (ASME), Las Vegas; in: ASME 2007 International Conference on Design Engineering Technical Conferences & Computers and Information in Engineering, 2007
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T. Kottke, A. Steininger: A Fail-Silent Reconfigurable Superscalar Processor
13th Pacific Rim International Symposium on Dependable Computing (PRDC 07), Melbourne; in: 13th Pacific Rim International Symposium on Dependable Computing (PRDC'07), Melbourne, 2007, p. 232 - 239
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C. Angerer, O. Cevan, L. Fauster, Y. Huang, B. Huber, V. Legourski, S. Pirker, T. Polzer, D. Reichhard, D. Rigler, A. Schuster, B. Weirich, P Tummeltshammer, M. Delvai: Exploring Hardware Software Partitioning on the Example of a Face Recognition System
Austrochip, Graz; in: Austrochip - Workshop on Microelectronics, 2007, ISBN: 978-3-902465-87-0, p. 121 - 127
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E. Armengaud, A. Steininger, A. Hanzlik: The Effect of Quartz Drift on Convergence-Average based Clock Synchronization
IEEE International Conference on Emerging Technologies and Factory Automation (ETFA), Patras; in: Proceedings of the 12th IEEE Conference on Emerging Technologies and Factory Automation, 2007, p. 1123 - 1130
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E. Armengaud, W. Forster: A Novel Interconnection Approach for Globally Asynchronous Locally Synchronous Circuits
Austrochip, Graz; in: Austrochip - Workshop on Microelectronics, 2007, p. 107 - 113
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T. Handl, A. Steininger, G. Kempf: Adopting the Scan Approach for a Fault Tolerant Asynchronous Clock Generation Circuit
International Design and Test Workshop (IDT), Kairo; in: Proceedings IDT'07 - The Second International Design and Test Workshop, 2007, p. 115 - 119
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M. Delvai, T. Panhofer: SELF-HEALING CIRCUITS FOR SPACE-APPLICATIONS
17th International Conference on Field Programmable Logic and Applications (FPL2007), Amsterdam; in: Proceedings of 17th INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS, 2007, ISBN: 1-4244-1060-6, p. 505 - 506
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J. Grahsl, T. Handl, A. Steininger, G. Kempf: SAFE - A Scalable Environment for Automated Transistor Level Fault Effect Analysis
Austrochip, Graz; in: Austrochip - Workshop on Microelectronics, 2007, p. 91 - 98
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J. Widder, G. Gridling, B. Weiss, J. Blanquart: Synchronous Consensus with Mortal Byzantines
IEEE Conference on Dependable Systems and Networks (DSN), Edinburgh; in: Proceedings of the 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2007
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M. Biely, M. Hutle, L. Penso, J. Widder: Relating Stabilizing Timing Assumptions to Stabilizing Failure Detectors Regarding Solvability and Efficiency
Ninth International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2007), Paris; in: stabilization, 2007
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M. Biely, B. Charron-Bost, A. Gaillard, M. Hutle, A. Schiper, J. Widder: Tolerating Corrupted Communication
ACM Symposium on Principles of Distributed Computing, Portland; in: 26th ACM Symposium on Principles of Distributed Computing (PODC'07), 2007, p. 244 - 253
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P. Jahn, T. Polzer: Graphical Microcontroller Programming (GMCP)
IEEE International Conference on Industrial Informatics - INDIN 2007, Vienna, Austria
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U. Schmid, A. Steininger, H. Veith: Towards a Systematic Design of Fault-Tolerant Asynchronous Circuits
GMM/GI/ITG-Fachtagung Zuverlässigkeit und Entwurf, München; in: Fachtagung Zuverlässigkeit und Entwurf, VDE Verlag, 2007, ISBN: 978-3-8007-3023-0, p. 173 - 174
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T. Kottke, A. Steininger: Vergleich zweier zwischen Sicherheit und Performanz rekonfigurierbarer Prozessorsysteme
19. ITG/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Errlangen; in: 19. Workshop - Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2007
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T. Handl, A. Steininger, G. Kempf: An Efficient Test Strategy for a Fault-Tolerant Clock Generator for Systems-on-Chip
19. ITG/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Errlangen; in: 19. Workshop - Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2007, p. 66 - 70
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A. Steininger: The DARTS project
ESA Workshop, Wien
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A. Steininger: The ECS group's hardware related research activities
Firma Freescale, München
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J. Widder, G. Gridling, B. Weiss, J. Blanquart (invited): Synchronous Consensus with Mortal Byzantines
Dagstuhl Seminar 06371. From Security to Dependability, Dagstuhl
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U. Schmid (invited): Wissenschaftliche Forschung - Quo vadis?
IKT in Österreich 2006, Wien
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H. Moser, B. Thallner: Reconciling Distributed Computing Models and Real-Time Systems
IEEE Real-Time Systems Symposium, Rio de Janiero; in: Proceedings of the 27th IEEE Real-Time Systems Symposium (RTSS'06), 2006, p. 73 - 76
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H. Moser, B. Thallner: Construction of a Fault-Tolerant Wireless Communication Topology Using Distributed Agreement
Workshop on Dependability issues in wireless ad hoc networks and sensor networks (DIWANS), Los Angeles; in: DIWANS '06: Proceedings of the 2006 workshop on Dependability issues in wireless ad hoc networks and sensor networks, 2006, p. 35 - 43
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H. Moser, U. Schmid: Construction of a Fault-Tolerant Wireless Communication Topology Using Distributed Agreement
Junior Scientist Conference, Wien; in: Junior Scientiest Conferenve 2006, 2006, p. 47 - 48
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H. Moser, U. Schmid: Optimal clock synchronization revisited: Upper and lower bounds in real-time systems
International Conference On Principles Of Distributed Systems (OPODIS), Bordeaux; in: Principles of Distributed Systems, 2006, p. 94 - 109
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C. Trödhandl, B. Weiss, T. Handl, M. Proske (invited): Environments for Remote Teaching in Embedded Systems Courses
ERCIM / DECOS Workshop on Dependable Embedded Systems, Cavtat; in: 2006 ERCIM / DECOS Workshop on Dependable Embedded Systems, 2006
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M. Hutle, D. Malkhi, U. Schmid, L. Zhou: Brief Announcement: Chasing the Weakest System Model for Implementing Omega and Consensus
8th International Symposium on Stabilization, Safety, and Security of Distributed Systems, Dallas; in: Stabilization, Safety, and Security of Distributed Systems, 2006
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M. Proske, C. Trödhandl, T. Handl: Distance Labs - Embedded Systems @home
Edutainment 2006, Zhejiang; in: Journal of Computational Information Systems, 2006, p. 435 - 444
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M. Proske, C. Trödhandl: Anytime, Everywhere - Approaches to Distance Labs in Embedded Systems Education
ICTTA06: International Conference on Information & Communication Technologies, Damascus; in: Proceedings of ICTTA 2006, 2006; 6 pages
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C. El Salloum, A. Steininger, P Tummeltshammer: Recovery Mechanisms for Dual Core Architectures
IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT ), Washington DC, USA; in: 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2006, Proceedings, 2006, ISBN: 0-7695-2706-x, p. 380 - 388
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D. Albeseder, J. Widder: Simulating Distributed Real-Time Systems
Junior Scientist Conference, Wien; in: Junior Scientist Conference 2006, 2006, p. 83 - 84
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T. Handl, A. Steininger: Implementation of an FPGA-Based Hardware Fault Injector
Junior Scientist Conference, Wien; in: Junior Scientist Conference 2006, 2006, p. 23 - 24
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H. Stratil, U. Schmid: Efficient Position-based Communication in Wireless Ad-hoc Networks
Junior Scientist Conference, Wien; in: Junior Scientist Conference 2006, 2006, p. 75 - 76
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P Tummeltshammer, A. Steininger: Time-Multiplexed Multiple Constant Multiplication
Junior Scientist Conference, Wien; in: Junior Scientist Conference 2006, 2006, p. 77 - 78
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M. Delvai, A. Steininger: A Practical Comparison of Logic Design Styles
The 3rd International Conference on Cybernetics and Information Technologies, Systems and Applications, Orlando; in: The 3rd International Conference on Cybernetics and Information Technologies, Systems and Applications - Volume 3, 2006, p. 61 - 66
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M. Delvai, A. Steininger: Asynchronous Logic Design - from Concepts to Implementation
The 3rd International Conference on Cybernetics and Information Technologies, Systems and Applications, Orlando; in: The 3rd International Conference on Cybernetics and Information Technologies, Systems and Applications - Volume 1, 2006, p. 81 - 86
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M. Delvai, A. Steininger: Solving the Fundamental Problem of Digital Design -- A Systematic Review of Design Methods
9th Euromicro Conference on Digital System Design, Dubrovnik; in: 9th Euromicro Conference on Digital System Design - Architectures, Methods and Tools, 2006, p. 131 - 136
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M. Biely, J. Widder: Optimal Message-Driven Implementations of Omega with Mute Processes
8th International Symposium on Stabilization, Safety, and Security of Distributed Systems, Dallas; in: Stabilization, Safety, and Security of Distributed Systems, 2006, p. 110 - 121
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G. Gridling, B. Weiss: A µController Lab for Distance Learning
6th International Workshop on Microelectronics Education, Stockholm; in: EWME 2006 - Proceedings, 2006, p. 129 - 132
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C. Trödhandl, M. Proske, W. Elmenreich: Remote Target Monitoring in Embedded Systems Lab Courses using a Sensor Network
The 32nd Annual Conference of the IEEE Industrial Society, Paris; in: The 32nd Annual Conference of the IEEE Industrial Society - IECON'2006, 2006, p. 5433 - 5438
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W. Elmenreich, C. Trödhandl, B. Weiss: Embedded Systems Home Experimentation
Second IASTED International Conference on Education and Technology, Calgary; in: Proceedings of the Second International Conference on Education and Technology, 2006, p. 11 - 15
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G. Gridling, B. Weiss, W. Elmenreich, C. Trödhandl: Embedded Systems Exams With True/False Questions: A Case Study
Second IASTED International Conference on Education and Technology, Calgary; in: Proceedings of the Second International Conference on Education and Technology, 2006, p. 168 - 172
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E. Armengaud, A. Steininger: Automatic Parameter Identification in FlexRay Based Automotive Communication Networks
IEEE International Conference on Emerging Technologies and Factory Automation, Prag; in: 11th IEEE International Conference on Emerging Technologies and Factory Automation, 2006, p. 897 - 904
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E. Armengaud, A. Steininger: Pushing the Limits of Remote Online Diagnosis in FlexRay Networks
IEEE International Workshop on Factory Communication Systems, Torino; in: 6th IEEE International Workshop on Factory Communication Systems, 2006
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E. Armengaud, A. Steininger: A Remote and Transparent Approach for the Test and Diagnosis of Automotive Networks
Junior Scientist Conference, Wien; in: Junior Scientist Conference 2006, 2006
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E. Armengaud: Low Level Bus Traffic Replay for the Test of Time-Triggered Communication Systems
9th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS06), Prag; in: 9th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, 2006, p. 155 - 156
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E. Armengaud: ExTraCT: A New Approach for the Transparent Test of Time-Triggered Communication Systems
18. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Titisee; in: 18. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2006
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M. Ferringer, G. Fuchs, A. Steininger, G. Kempf: VLSI Implementation of a Fault-Tolerant Distributed Clock Generation
International Symp. on Defect and Fault Tolerance in VLSI-Systems, Arlington; in: The 21st IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems, 2006, p. 563 - 571
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A. Steininger, M Függer, U. Schmid, G. Fuchs: Fault-Tolerant Algorithms on SoCs - A case study
IEEE International Conference on Dependable Systems and Networks, Philadelphia; in: Supplement Proceedings of the 2006 International Conference on Dependable Systems and Networks (DSN), 2006, p. 190 - 191
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M Függer, U. Schmid, G. Fuchs, G. Kempf: Fault-Tolerant Distributed Clock Generation in VLSI Systems-on-Chip
European Dependable Computing Conference, Coimbra; in: EDCC-6, 2006, p. 87 - 96
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G. Fuchs, J. Grahsl, U. Schmid, A. Steininger, G. Kempf: Threshold Modules -- Die Schlüsselelemente zur Verteilten Generierung eines Fehlertoleranten Taktes
Austrochip, Wien; in: Austrochip Mikroelektroniktagung, 2006, p. 149 - 156
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M Függer, T. Handl, A. Steininger, J. Widder, C. Tögel: An Efficient Test for a Transition Signalling based Up-/Down-Counter
Austrochip, Wien; in: Austrochip Mikroelektroniktagung, 2006, p. 55 - 62
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A. Steininger, T. Handl, G. Fuchs, F. Zangerl (invited): Testing the Hardware Implementation of a Distributed Clock Generation Algorithm for SoCs
East-West Design & Test International Workshop (EWDTW'06), Sochi; in: East-West Design & Test International Workshop, 2006, p. 59 - 64
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G. Fuchs, M Függer, A. Steininger, F. Zangerl: Analysis of Constraints in a Fault-Tolerant Distributed Clock Generation Scheme
3rd International Workshop on Dependable Embedded Systems, Leeds; in: WDES 2006 3rd Workshop on Dependable Embedded Systems, 2006, p. 22 - 27
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T. Kottke, A. Steininger: A Reconfigurable Generic Dual-Core Architecture
IEEE International Conference on Dependable Systems and Networks, Philadelphia; in: Proceedings of the 2006 International Conference on Dependable Systems and Networks (DSN), 2006, p. 45 - 54
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A. Steininger, T. Kottke: Ein dynamisch rekonfigurierbarer superskalarer Prozessor mit den Modi Sicherheit und Performanz
18. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Titisee; in: 18. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2006, p. 36 - 40
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M. Delvai, A. Steininger: Teaching Hardware Software Codesign to Software Engineers
1st International Workshop on Reconfigurable Computing Education, Karlsruhe; in: International Workshop on Reconfigurable Computing Education, 2006
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M. Delvai, A. Steininger: ASPEAR - An Asynchronous 16 Bit RISC Processor Core
Siemens PSE Technology Day, Wien
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J.-F. Hermant, J. Widder: Implementing Reliable Distributed Real Time Systems with the Theta Model
International Conference on Principles of Distributed Systems, Pisa; in: 9th International Conference on Principles of Distributed Systems, 2005, p. 259 - 271
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E. Armengaud, A. Steininger, M. Horauer: A Method for Bit Level Test and Diagnosis of Communication Services
IEEE International Workshop on Desgin & Diagnostic of Electronic Circuits and Systems, Sopron; in: Proceedings of IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS) 2005, 2005, p. 69 - 74
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E. Armengaud, F Rothensteiner, A. Steininger, M. Horauer: A Flexible Hardware Architecture for Fast Access on Large Non-Volatile Memories
IEEE International Workshop on Desgin & Diagnostic of Electronic Circuits and Systems, Sopron; in: Proceedings of IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS) 2005, 2005, p. 113 - 120
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V. Legourski, C. Trödhandl, B. Weiss: A System for Automatic Testing of Embedded Software in Undergraduate Study Exercises
Workshop on Embedded Systems Education, Jersey City; in: Proceedings Workshop on Embedded Systems Education (WESE'05), 2005, p. 44 - 51
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G. Le Lann, U. Schmid: Proof-Based Systems Engineering in ASSERT
Data Systems in Aerospace, Edinburgh; in: Proof-Based Systems Engineering in ASSERT, 2005
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E. Armengaud, A. Steininger, M. Horauer: An Efficient Test and Diagnosis Environment for Communication Controllers
Austrochip, Wien; in: Austrochip 2005, ???, 2005
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M. Delvai, G. Fuchs, T. Handl, W. Huber, A. Steininger: Design of an Asynchronous Microprocessor with Four-State Logic
Austrochip, Wien; in: Austrochip 2005, 2005, p. 105 - 112
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T. Kottke, A. Steininger: Designoptimierung eines Prozessors mit Eigenfehlererkennung
17. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen;, Inssbruck; in: 16. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen;, 2005, p. 55 - 59
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D. Albeseder: Evaluation of Message Delay Correlation in Distributed Systems
3rd Workshop on Intelligent Solutions in Embedded Systems (WISES'05), Hamburg, Deutschland; in: Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems, 2005, p. 139 - 150
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H. Stratil: Voronoi supported communication in Wireless ad-hoc Networks
Second International Symposium on Voronoi Diagrams in Science and Engineering, Seoul, Korea; in: The 2nd International Symposium on Voronoi Diagrams in Science and Engineering, 2005, p. 105 - 116
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H. Stratil: Fault Tolerant Topology Control with unreliable Failure Detectors
IASTED International Conference on Parallel and Distributed Computing Systems, Phoenix, Arizona; in: Proceedings of the 17th IASTED International Conference on Parallel and Distributed Computing and Systems, 2005, ISBN: 0-88986-525-6, p. 767 - 772
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H. Stratil: Distributed Construction of an Underlay in Wireless Networks
European Workshop on Wireless Sensor Networks, Istanbul, Türkei; in: Proceedings of the Second European Workshop on Wireless Sensor Networks, 2005, p. 176 - 187
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B. Weiss, G. Gridling, M. Proske: A Case Study in Efficient Microcontroller Education
Workshop on Embedded Systems Education, Jersey City, New Jersey; in: Proceedings Workshop on Embedded Systems Education WESE 2005, 2005, p. 36 - 43
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B. Thallner, H. Moser: Topology Control for Fault-Tolerant Communication in Highly Dynamic Wireless Networks
Workshop on Intelligent Solutions in Embedded Systems, Hamburg, Deutschland; in: Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems, 2005, p. 89 - 100
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M. Biely, G. Le Lann, U. Schmid: Proof-Based System Engineering Using a Virtual System Model
International Service Availability Symposium, Berlin, Deutschland; in: Service Availability, 2005, p. 164 - 179
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M. Hutle, J. Widder: Brief Announcement: On the Possibility and the Impossibility of Message-Driven Self-Stabilizing Failure Detection
ACM Symposium on Principles of Distributed Computing, Las Vegas, Nevada; in: Proceedings of the 24th ACM Symposium on Principles of Distributed Computing, 2005, p. 208
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J. Widder, G. Le Lann, U. Schmid: Failure Detection with Booting in Partially Synchronous Systems
European Dependable Computing Conference, Budapest, Ungarn; in: Dependable Computing Conference - EDCC5, 2005, p. 20 - 37
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M. Hutle, J. Widder: On the Possibility and the Impossibility of Message-Driven Self-Stabilizing Failure Detection
Seventh International Symposium on Self Stabilizing Systems (SSS 2005), Barcelona, Spanien; in: Self Stabilizing Systems, 2005, p. 153 - 170
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M. Hutle, J. Widder: Self-Stabilizing Failure Detector Algorithms
IASTED International Conference on Parallel and Distributed Computing Systems, Innsbruck, Austria; in: IASTED International Conference on Parallel and Distributed Computing and Networks, 2005, ISBN: 0-88986-468-3, p. 485 - 490
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E. Armengaud, A. Steininger, M. Horauer: Efficient Stimulus Genereation for Remote Testing of Distributed Systems - The Flexray Example
ETFA, Catania, Italy; in: Proceedings of the 10th IEEE Internationla Conference on Emerging Technologies and Factory Automation, IEEE, I (2005), p. 763 - 770
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M. Schöberl: Design and Implementation of an Efficient Stack Machine
International Parallel and Distributed Processing Symposium (IPDPS), Denver, Colorado; in: Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International (IPDPS), 2005, ISBN: 0-7695-2312-9, p. 159
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J. Widder (invited): Why, Where and How to Use the Theta-Model
Seminaire Reflecs in INRIA Rocquencourt, Frankreich, INRIA Rocquencourt, Frankreich
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J. Widder: VLSI Design and the Theta-Model (Kurzvorstellungen aktueller Forschung)
Diskussionskreis Fehlertoleranz, Berlin
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U. Schmid: The Theta-Model
Diskussionskreis Fehlertoleranz, Berlin
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J. Widder (invited): The Theta-Model, and how to Boot Clock Synchronization in it
Seminaire Reflecs in INRIA Rocquencourt, Frankreich, INRIA Rocquencourt, Frankreich
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R. Pallierer, M. Horauer, A. Steininger: Monitoring and Fault Injection of X-by-Wire Communication Networks
Entwicklerforum Design & Elektronik: Drahtlose und drahtgebundene Netzwerke, Wien; in: Entwicklerforum Design & Elektronik: Drahtlose und drahtgebundene Netzwerke, 2004
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M. Horauer, F Rothensteiner, M Zauner, E. Armengaud, A. Steininger, H. Friedl, R. Pallierer: An FPGA based SoC Design for Testing Embedded Automotive Communication Systems employing the FlexRay Protocol
Austrochip, Wien; in: Austrochip 2004, TU-Wien, 2004, p. 119 - 123
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E. Armengaud, A. Steininger, M. Horauer, R. Pallierer: Design Trade-offs for Systematic Tests of Embedded Communication Systems
IEEE International Conference on Dependable Systems and Networks, Florence, Italy; in: International Conference on Dependable Systems and Networks (DSN 2004), 2004, p. 118 - 119
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B. Thallner: Fault Tolerant Communication Topologies for Wireless Ad Hoc Networks
IEEE International Conference on Dependable Systems and Networks, Florence, Italy; in: Proceedings 1st Workshop on Dependability Issues in Wireless Ad Hoc Networks and Sensor Networks (DIWANS'04), 2004, p. 261 - 266
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C. Fetzer, U. Schmid: Brief Announcement: On the Possibility of Consensus in Asynchronous Systems with Finite Average Response Times
23th ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing (PODC), St. John´s , Newfoundland, Canada; in: 23th ACM SIGACT-SIGOPS Symposium on PRINCIPLES of DISTRIBUTED commuting (PODC), 2004, p. 402
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P Tummeltshammer, J.C Hoe, M Püschel: Multiple Constant Multiplication By Time-Multiplexed Mapping of Addition Chains
DAC 04, San Diego, California, USA; in: DAC 04, 2004, p. 826 - 829
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H. Stratil: An efficient implementation of the greedy forwarding strategy
34. Jahrestagung der Gesellschaft für Informatik (GI), Ulm; in: GI-Edition Informatik 2004- Informatik verbindet, Köllen Druck+Verlag, Band 2, Ulm (2004), ISSN: 1617-5468, p. 365 - 369
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T. Kottke, A. Steininger: A Dual Core Architecture with Error Containment
East-West Design & Test International Workshop(EWDTW´04), Yalta-Alushta, Crimea, Ukraine; in: East-West Design & Test International Workshop, 2004, ISBN: 966-659-088-3, p. 102 - 108
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A. Steininger, T. Kottke: Concurrent Checking eines Adressdecoders
16. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Dresden, Germany; in: GMM/ITG Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2004, p. 25 - 29
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T. Kottke, A. Steininger: A Generic Dual-Core Architecture
7th IEEE International Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2004), Stara Lesna, Slovakia; in: 7th IEEE International Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2004), 2004, ISBN: 80-969117-9-1, p. 159 - 166
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E. Armengaud, A. Steininger, M. Horauer, R. Pallierer, H. Friedl: A Monitoring Concept for an Automotive Distributed Network - The FlexRay Example
7th IEEE International Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2004), Stara Lesna, Slovakia; in: Proceedings of the 7th Workshop on Design and Diognostics of Electronic Circuits and Systems, 2004, ISBN: 80-969117-9-1, p. 173 - 178
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E. Armengaud, A. Steininger, M. Horauer, R. Pallierer: A Layer Model for the Systematic Test of Time-Triggered Automotive Communication Systems
IEEE International Workshop on Factory Communication Systems, Vienna,Austria; in: IEEE Workshop on Factory Communication Systems (WFCS 04), IEEE Catalog Number 04TH8777 (2004), ISBN: 0-7803-8734-1, p. 275 - 283
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M. Hutle: On omega in sparse networks (Fast Abstract)
20th IEEE International Conference on Software Maintenance (ICSM'04), Papeete,Tahiti,French Polynesia; in: Proceedings of the 10th IEEE International Symposium Pacific Rim Dependable Computing, LAAS-CNRS, 2004, p. 37 - 38
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M. Hutle: An efficient failure detector for sparsely connected networks
22nd IASTED International Multi-Conference on Applied Informatics, Innsbruck, Austria; in: Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks, Acta Press, 2004, ISSN: 1027-2666, p. 369 - 374
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A. Steininger: Embedded Systems im Auto - Ein Vorbild für die Bahn?
Tagung, TU-Wien, Prechtlsaal; in: Intelligenz im Schienenverkehr: Sicherheitsstandarts und effiziente Kapatzitätsnutzung, 2004, p. #
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A. Steininger, T. Kottke: A Fail-Silent Memory for Automotive Applications
European Test Symposium, Ajaccio,Corsica,France; in: 9th European Test Symposium, 2004, p. 253 - 258
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M. Jankela, W. Puffitsch, W. Huber: Towards a Rapid Prototyping Framework for Architecture Exploration in Embedded Systems
Workshop on Intelligent Solutions in Embedded Systems, Graz, Austria; in: Proceedings of the Second Workshop on Intelligent Solutions im Embedded Systems, 2004, ISBN: 3902463007, p. 117 - 127
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K. Hendling, T. Losert, W. Huber, M. Jandl: Interference Minimizing Bandwidth Guaranteed On-Line Routing Algorithm for Traffic Engineering
IEEE International Conference on Networks (2004, 12th ICON), Singapur; in: Proceedings of the IEEE International Conference on Networks (2004, 12th ICON), IEEE, Volume 2 (2004), ISBN: 0-7803-8783-x, p. 497 - 503
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R. Gallo, M. Delvai, W. Elmenreich, A. Steininger: Revision and Verification of an Enhanced UART
IEEE International Workshop on Factory Communication Systems, Vienna, Austria; in: Proceedings of the 2004 IEEE International Workshop on Factory Communication Systems, IEEE, 2004, ISBN: 0-7803-8734-1, p. 315 - 318
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B. Rahbaran, M Függer, A. Steininger: Embedded Real-Time-Tracer --An Approach with IDE
Workshop on Intelligent Solutions in Embedded Systems, Austria, Graz; in: Proceedings of the Second Workshop on Intelligent Solutions in Embedded Systems, 2004, ISBN: 3-902463-00-7, p. 25 - 35
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B. Rahbaran, A. Steininger: Real-time Fault Injection with Signal-Flip model by FIDYCO
IEEE International Conference on Dependable Systems and Networks, Florence, Italy; in: DSN 2004 Supplement, IEEE Computer Society, Supplemental (2004), p. 70 - 71
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B. Rahbaran, A. Steininger, T. Handl: Built-in Fault Injection in Hardware-- The FIDYCO Example
IEEE International Workshop on Electronic Design, Test and Applications, Perth, Australia; in: Second IEEE International Workshop on Electronic Design, Test and Applications, B. Rahbaran, A. Steininger (ed.); IEEE Computer Society Press, Delta 2004, Perth Australia (2004), ISBN: 0-7695-2081-2, p. 327 - 332
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J. Widder: Booting clock synchronization in partially synchronous systems.
International Conference on Distributed Computing Systems, Sorrento, Italy; in: Proceedings of the 17th International Symposium on Distributed Computing, 2003, p. 121 - 135
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U. Schmid, C. Fetzer: Randomized asynchronous consensus with imperfect communications.
IEEE Symposium on Reliable Distributed Systems, Florence, Italy; in: Proc. 22nd Symposium on Reliable Distributed Systems, 2003, p. 361 - 370
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M. Horauer, U. Schmid, K. Schossmaier, R. Höller, N. Kerö: PSynUTC --- evaluation of a high precision time synchronization prototype system for Ethernet LANs.
IEEE Precise Time and Time Interval Systems and Application Meeting, Reston, Virginia, USA; in: Proceedings of the 34th IEEE Precise Time and Time Interval Systems and Application Meeting (PTTI'02), 2003, p. 263 - 278
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M. Biely: An optimal Byzantine agreement algorithm with arbitrary node and link failures.
IASTED International Conference on Parallel and Distributed Computing Systems, Marina Del Rey, California, USA; in: Proc. 15th Annual IASTED International Conference on Parallel, 2003, p. 146 - 151
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M. Delvai, M. Jankela, A. Steininger: Towards Virtual Prototyping of Embedded Computer Systems
The 7th World Multiconference on Systemics, Cybernetics and Informatics, Orlando, Florida; in: Proceedings, Volume I, Information Systems, Technologies and Applications, 2003, p. 70 - 75
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M. Schöberl: Using a Java Optimized Processor in a Real World Application
Workshop on Intelligent Solutions in Embedded Systems, Vienna, Austria; in: Proceedings of the First Workshop on Intelligent Solutions in Embedded Systems, W. Elmenreich (ed.); 2003, p. 165 - 176
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M. Delvai, C. El Salloum, A. Steininger: A Generic Real-time Debugger Architecture
World Multiconference on Systemics, cybernetics and Informatics, Orlando, Florida; in: The 7th World Multiconference on Systemics, Cybernetics and Informatics, 2003, p. 65 - 70
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M. Delvai, U. Eisenmann, W. Elmenreich: A Generic Architecture for Integrated Smart Transducers
International Conference, FPL 2003, Lissabon, Portugal
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A. Steininger, B. Rahbaran, T. Handl: Built-in Fault Injectors - The Logical Continuation of BIST?
Workshop on Intelligent Solutions in Embedded Systems (WISES'03), Wien; in: Proceeding of the First Workshop on Intelligent Solutions in Embedded Systems, 2003, p. 187 - 196
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M. Delvai, G. Fuchs: LANCE: A 16 Bit Superscalar Processor
Austrochip, Linz; in: Austrochip 2003, 2003, p. 87 - 90
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M. Delvai, U. Eisenmann, W. Elmenreich: Intelligent UART Module for Real-Time Applications
Workshop on Intelligent Solutions in Embedded Systems (WISES'03), Wien; in: Proceedings of the First Workshop on Intelligent Solutions in Embedded Systems, 2003, p. 177 - 185
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M. Delvai, W. Huber, P. Puschner, A. Steininger: Processor Support for Temporal Predictability - The SPEAR Design Example
15th Euromicro Conference on Real-Time Systems, Porto, Portugal; in: Proceedings of the 15 Euromicro International Conference on Real-Time Systems, 2003, p. 169 - 176
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W. Kastner, B. Thallner: A General Public License Linux Device Driver for the EIB
EIB Scientific Conference and Technology Workshop, Munich, Germany; in: EIB-Proceedings V, 2001
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G. Gridling, B. Thallner: Simulation of a Wireless CDMA ad hoc network
IASTED Int. Conf. Communictions and Computer Networks, Cambridge, USA; in: Proceedings of the IASTED Internatonal Conference on Communications and Computer Networks, 2002, ISBN: 0-88986-329-6, p. 354 - 359
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R. Höller, M. Horauer, G. Gridling, N. Kerö, U. Schmid, K. Schossmaier: SynUTC - high precision time synchronization over Ethernet networks
8th Workshop on Electronics for LHC Experiments, Colmar; France; in: Proceedings 8th Workshop on Electronics for LHC Experimets (LECC'02), 2002, ISBN: 92-9083-202-9, p. 428 - 432
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W. Kastner, B. Thallner: Connecting EIB to Linux and Java
6th IEEE Africon Conference, George, South Africa; in: Proceedings of the IEEE 6th AFRICON Conference, 2002, ISBN: 0-7803-7570-x, p. 273 - 276
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W. Elmenreich, M. Delvai: Time-Triggered Communication with UARTs
IEEE International Workshop on Factory Communication Systems, Västeraas; in: Proceedings of the 4th IEEE International Workshop on Factory Communication Systems, 2002, p. 97 - 104
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K. Thaller: A highly-efficient transparent online memory test
Test Conference, Baltimore, MD, USA; in: Proceedings, 2001, p. 230 - 239
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M. Delvai, U. Eisenmann, W. Huber: Modular Construction System for Embedded Real-Time Applications
Austrochip, Wien; in: Austrochip 2002, 2002, p. 103 - 109
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A. Steininger, C. Scherrer: How To Tune the MTTF of a Fault-Tolerant System
International Symp. on Defect and Fault Tolerance in VLSI-Systems, San Francisco, California, USA; in: PROCEEDINGS, 2001, p. 251 - 256
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C. Scherrer, A. Steininger: How does Resource Utilization Affect Fault Tolerance?
International Symp. on Defect and Fault Tolerance in VLSI-Systems, Mt. Fuji, Yamanashi, Japan; in: PROCEEDINGS, 2000, p. 418 - 425
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C. Scherrer, A. Steininger: Periodic Node Shutdown in a Fail-Silent Architecture - Risk or Rescue?
World Multiconference on Systemics, cybernetics and Informatics, Orlando, Florida, USA; in: PROCEEDINGS, 2000, p. 205 - 210
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J. Vilanek, A. Steininger: FPGA Implementation of the Time-Triggered Protocol Controller TTPC-C Verification, Design-Experiences and Benefits
World Multiconference on Systemics, cybernetics and Informatics, Orlando, Florida, USA; in: PROCEEDINGS, 2002, p. 407 - 412
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A. Steininger, J. Vilanek: Using Offline and Online BIST to Improve System Dependability - The TTPC-C Example
IEEE INTERNATIONAL CONFERENCE ON COMPUTER Design: VLSI in Computers & Processors, Freiburg, Germany; in: Computer Design: VLSI in Computers & Processors, 2002, p. 277 - 280
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M. Delvai, W. Huber, B. Rahbaran, A. Steininger: SPEAR-Design-Entscheidungen für den "Scalable Processor for Embeded Application in Real-Time Environment"
Austrochip, wien; in: Die Österreichische Tagnung zum Themenbereich Mikroelektronik, 2001, p. 25 - 32
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M. Delvai, W. Huber, B. Rahbaran, A. Steininger: An FPGA-Based Development Platform for the virtual Real-Time Processor Component SPEAR
IEEE Design and Diagnostics of Electronic Circuits and Systems (IEEE DDECS 2002), Brno, Czech Republic; in: Proceedings of IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop, 2002, p. 98 - 105
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T. Losert, W. Huber, K. Hendling, M. Jandl: An Extensible Transport Framework for CORBA with Emphasis on Real-Time Capabilities
Second IEEE International Conference on Computational Cybernetics 2004 (ICCC'04), Vienna, Austria; in: Proceeding of ICCC'04, 2004, ISBN: 3-902463-01-5, p. 155 - 161
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