Publications

Shows publications by members of the Embedded Systems group.

Currently viewing all publications in category Theses - back to overwiew...

Theses

F. Huemer: Protecting 4-Phase Delay-Insensitive Communication Against Transient Faults (Master's Thesis)
reviewer: A. Steininger; Technische Informatik, 2017; oral examination: 2017-02-20
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S. Varadan: Design of Custom ASIC for Radiation Experiments to Study Single Event Effects (PhD Thesis)
reviewers: C. Metra, M. Krstic; Technische Informatik, 2017; oral examination: 2017-11-24
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C. Hermann: ASCARTS Design of an Asynchronous Processor using a High-Level Specification Language (Master's Thesis)
reviewers: A. Steininger, J. Lechner; Institut für Technische Informatik, 2016
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P. Robinson: Weak System Models for Fault-Tolerant Distributed Agreement Problems (PhD Thesis)
reviewers: U. Schmid, M. Raynal; Institut für Technische Informatik (E182/2), 2011; oral examination: 2011-01-31
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A. Kößler: Real-Time Performance Analysis of Synchronous Distributed Systems (PhD Thesis)
reviewers: U. Schmid, K. Chatterjee; Institut für Technische Informatik (E182/2), 2014; oral examination: 2014-11-27
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R. Kutschera: Efficient Interfacing Between Timing Domains (Master's Thesis)
reviewer: A. Steininger; Technische Informatik, 2014
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C. Trenkwalder: Effekte von Stuck-At Faults in Delay-Insensitiver Logik (Master's Thesis)
reviewer: A. Steininger; Technische Informatik, 2014
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J. Maier: Online Test Vector Insertion - A Concurrent Built-In Self-Testing (CBIST) Approach for Asynchronous Logic (Master's Thesis)
reviewer: A. Steininger; Technische Informatik, 2014
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A. Heinisch: Selection and Hardware-Implementation of an Efficient Consensus Algorithm for a Mesochronous System (Master's Thesis)
reviewers: T. Polzer, A. Steininger; Technische Informatik, 2015; oral examination: 2015-01-15
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S. Resch: Composability for Fail-Safe Safety-Critical Systems (PhD Thesis)
reviewers: A. Steininger, W. Elmenreich; Technische Informatik, 2014; oral examination: 2015-01-26
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J. Lechner: Building Robust GALS Circuits: Fault-Tolerant and Variation-Aware Design Techniques for Reliable Circuit Operation (PhD Thesis)
reviewers: A. Steininger, J. Sparso; Institut für Technische Informatik, 2014; oral examination: 2014-06-17
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S. Naqvi: A Non-Blocking Fault-Tolerant Asynchronous Networks-on-Chip Router (PhD Thesis)
reviewers: A. Steininger, E. Grass, M. Schöberl; Institut für Technische Informatik, 2013
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W. Friesenbichler: Effects and Mitigation of Transient Faults in Quasi Delay-Insensitive Logic (PhD Thesis)
reviewers: A. Steininger, H. Vierhaus; Institut für Technische Informatik, 2012
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T. Panhofer: Self-Healing Asynchronous Circuits for High-Reliability Applications (PhD Thesis)
reviewers: A. Steininger, H. Vierhaus; Institut für Technische Informatik, 2012
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T. Polzer: A Digital Metastability Model for VLSI Circuits (PhD Thesis)
reviewers: A. Steininger, A. Yakovlev; Institut für Technische Informatik, 2013
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T. Reinbacher: Analysis of Embedded Real-Time Systems at Runtime (PhD Thesis)
reviewers: A. Steininger, J. Schumann, S. Kowalewski; Institut für Technische Informatik, 2013
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M. Ferringer: Asynchronous Logic in Real-Time Systems (PhD Thesis)
reviewers: A. Steininger, G. Fohler; Institut für Technische Informatik, 2012
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T. Kottke: Untersuchung von fehlertoleranten Prozessorarchitekturen für sicherheitsrelevante Automobilanwendungen (PhD Thesis)
reviewers: A. Steininger, H. Wunderlich; Institut für Technische Informatik, 2005
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K. Ambrosch: Mapping Stereo Matching Algorithms to Hardware (PhD Thesis)
reviewers: A. Steininger, R. Siegwart; Institut für Technische Informatik, 2009
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A. Hagmann: Performance Aware Hardware Runtime Monitors (Master's Thesis)
reviewer: A. Steininger; Institut für Technische Informatik, 2013
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K. Pados: Design and Evaluation of an AXI4 Bus System (Master's Thesis)
reviewer: A. Steininger; Institut für technische Informatik, 2013
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O. Hechinger: Analysis of the Failure Behavior of Memory Management Units (Master's Thesis)
reviewer: A. Steininger; Institut für technische Informatik, 2013
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M. Perner: Self-Stabilizing Byzantine Fault-Tolerant Clock Distribution in Grids (Master's Thesis)
reviewer: U. Schmid; Institut für technische Informatik, 2013; oral examination: 2013-10-08
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M. Schwarz: Solving k-Set Agreement in Dynamic Networks (Master's Thesis)
reviewer: U. Schmid; Institut für technische Informatik, 2013; oral examination: 2013-10-08
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K. Winkler: Easy Impossibility Proofs for k-Set Agreement (Master's Thesis)
reviewer: U. Schmid; Institut für technische Informatik, 2013; oral examination: 2013-11-22
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M. Hofstätter: Solving the Labeling Problem - A Byzantine Fault-Tolerant Self-Stabilizing FPGA Prototype based on the FATAL+ Protocol (Master's Thesis)
reviewers: U. Schmid, M Függer; Institut für technische Informatik, 2013; oral examination: 2013-10-08
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B. Fuchs: Elaboration of a Fault-Tolerant Strategy for Space-born Digital Signal Processing Applications (Master's Thesis)
reviewer: A. Steininger; Technische Informatik, 2012
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T. Nowak: Topology in Distributed Computing (Master's Thesis)
reviewer: U. Schmid; Institut für Technische Informatik - 182/2, 2010
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A. Dielacher: A Pipelined Distributed Fault-Tolerant Clock Generation Algorithm in VLSI - Proofs and Implementation (Master's Thesis)
reviewers: U. Schmid, M Függer; Institut für Technische Informatik - 182/2, 2010
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M Függer: Analysis of On-Chip Fault-Tolerant Distributed Algorithms (PhD Thesis)
reviewers: U. Schmid, L. Welch; Institut für Technische Informatik - 182/2, 2010
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S. Khattab: Efficient Interference Reduction in Low Complex Digital Direct Sequence Spread Spectrum Systems (PhD Thesis)
reviewers: A. Goiser, U. Schmid; E389, 2010; oral examination: 2010-06-02
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M. Biely: Dynamic Aspects of Modelling Distributed Computations (PhD Thesis)
reviewers: U. Schmid, B. Charron-Bost; Institut für Technische Informatik, 2009; oral examination: 2009-11-30
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P Tummeltshammer: Analysis of Common Cause Faults in Dual Core Architectures (PhD Thesis)
reviewers: A. Steininger, Z. Kotasek; Institut für Technische Informatik, 2009; oral examination: 2009-10-20
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H. Moser: A Model for Distributed Computing in Real-Time Systems (PhD Thesis)
reviewers: U. Schmid, L. Welch; Institut für Technische Informatik, 2009; oral examination: 2009-05-20
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G. Fuchs: Fault-Tolerant Distributed Algorithms for On-Chip Tick Generation: Concepts, Implementations and Evaluations (PhD Thesis)
reviewers: A. Steininger, C. Metra; Institut für Technische Informatik, 2009; oral examination: 2009-10-20
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P. Jahn: Automated Regression Testing of Embedded Devices (Master's Thesis)
reviewers: A. Steininger, A. Reisenbauer; Institut für Technische Informatik, 2009
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T. Polzer: Fault-Tolerant Hardware Implementation of a Consensus Algorithm (Master's Thesis)
reviewers: A. Steininger, T. Handl; Institut für Technische Informatik, 2009
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H. Muhr: Concepts for Virtual Prototyping of Distributed Embedded Systems (PhD Thesis)
reviewers: D. Dietrich, A. Steininger; Institut für Computertechnik, 2008; oral examination: 2008-12-22
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E. Armengaud: A Transparent Online Test Approach for Time-Triggered Communication Protocols (PhD Thesis)
reviewers: A. Steininger, F. Simonot-Lion; Institut für technische Informatik, 2008
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J. Lechner: FSL Tool (Master's Thesis)
reviewer: M. Delvai; Institut f. Technische Informatik, Embedded Computing Systems Group, 2008
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W. Klein: Asynchronous EUART (Master's Thesis)
reviewer: M. Delvai; Institut f. technische Informatik, Embedded Computing Systems Group, 2008
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J. Mosser: AMBA4SPEAR2: An AMBA Extension Module for the SPEAR2 Processor Core (Master's Thesis)
reviewer: M. Delvai; Institut f. Technische Informatik, Embedded Computing Systems Group, 2008
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M. Fletzer: SPEAR2 - An Improved Version of SPEAR (Master's Thesis)
reviewer: M. Delvai; Institut f. Technische Informatik, Embedded Computing Systems Group, 2008
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M. Jeitler: Optimization of FSL Gates (Master's Thesis)
reviewer: M. Delvai; Institut für Technische Informatik, 2008
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R. Gallo: Revision and Verification of an Enhanced UART (Master's Thesis)
reviewers: M. Delvai, A. Steininger; Technische Informatik, E182/2, 2005; oral examination: 2005-01-01
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M. Ferringer: An Asynchronous Hardware Design for Distributed Tick Generation (Master's Thesis)
reviewer: A. Steininger; Technische Informatik, E182/2, 2006; oral examination: 2006-01-01
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M Függer: Fault-Tolerant Distributed Clock Generation in VLSI Systems-on-Chip (Master's Thesis)
reviewer: U. Schmid; Technische Informatik, E182/2, 2006; oral examination: 2006-01-01
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H. Stratil: Advantages and Limitations of Position-based Communication in Wireless Ad-hoc Networks (PhD Thesis)
reviewer: U. Schmid; Technische Informatik, E182/2, 2005; oral examination: 2005-01-01
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M. Hutle: Failure Detection in Sparse Networks (PhD Thesis)
reviewer: U. Schmid; Technische Informatik, E182/2, 2005; oral examination: 2005-01-01
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B. Rahbaran: An Experimental Comparison of Robustness between Synchronous and Asynchronous Logic Design (PhD Thesis)
reviewer: A. Steininger; Technische Informatik, E182/2, 2005; oral examination: 2005-01-01
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W. Huber: Design of an Asynchronous Processor Based on Code Alternation Logic - Exploration of Delay Insensitivity (PhD Thesis)
reviewer: A. Steininger; Technische Informatik, E182/2, 2005; oral examination: 2005-01-01
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M. Schöberl: JOP: A Java Optimized Processor for Embedded Real-Time Systems (PhD Thesis)
reviewers: A. Steininger, P. Puschner; Technische Informatik, E182, 2005; oral examination: 2005-01-01
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H. Moser: Distributed Construction of a Fault-Tolerant Wireless Communication Topology for Networked Embedded Systems (Master's Thesis)
reviewer: U. Schmid; Institut für Technische Informatik / Embedded Computing Systems, 2005
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P Tummeltshammer: Multiple Constant Multiplication by Time-Multiplexed Mapping of Addition Chains (Master's Thesis)
reviewer: A. Steininger; Institut für Technische Informatik / Embedded Computing Systems, 2004
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T. Handl: Implementierung eines FPGA-basierten Hardware-Fehlerinjektors (Master's Thesis)
reviewer: A. Steininger; Institut für Technische Informatik / Embedded Computing Systems, 2004
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G. Fuchs: A Superscalar 16 Bit Microcontroller for Real-Time Applications (Master's Thesis)
reviewers: A. Steininger, M. Delvai; Institut für Technische Informatik / Embedded Computing Systems, 2004
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D. Albeseder: Experimentelle Verifikation von Synchronitätsannahmen für Computernetzwerke (Master's Thesis)
reviewer: U. Schmid; Institut für Technische Informatik / Embedded Computing Systems, 2004
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M. Delvai: Design of an Asynchronous Processor Based on Code Alternation Logic - Treatment of Non-Linear Data Paths (PhD Thesis)
reviewers: A. Steininger, R. Eier; Institut für Technische Informatik / Embedded Computing Systems, 2005
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J. Widder: Distributed Computing in the Presence of Bounded Asynchrony (PhD Thesis)
reviewers: U. Schmid, M. Jazayeri; Institut für Technische Informatik / Embedded Computing Systems, 2004
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T. Pedram: Asynchrone Realisierung einer Arithmetic Logic Unit (Master's Thesis)
reviewers: M. Delvai, A. Steininger; Institut für Technische Informatik, 2003
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M. Eggenhofer: Entwicklung eines USB fullspeed VHDL-Cores (Master's Thesis)
reviewers: J. Vilanek, A. Steininger; Institut für Technische Informatik, 2003
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C. El Salloum: Realisierung eines generischen Online Debuggers für Embedded Systems (Master's Thesis)
reviewers: M. Delvai, A. Steininger; Institut für Technische Informatik, 2003
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M. Jankela: Realization of a Re-Usable Offline Debugger for the SPEAR Micro-Controller (Master's Thesis)
reviewers: A. Steininger, M. Delvai; Institut für Technische Informatik, 2002
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B. Thallner: Ein Linuxtreiber für den Europäischen Installationsbus EIB (Master's Thesis)
reviewers: W. Kastner, G. Schildt; Institut für Rechnergestützte Automation, 2001
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H. Stratil: Topology Management and Routing in Wireless Networks - An Overview (Master's Thesis)
reviewer: U. Schmid; 183, 2002
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M. Biely: Byzantine agreement under the perception-based fault model (Master's Thesis)
reviewer: U. Schmid; 183, 2002
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M. Hutle: Constraint Satisfaction Problems - Hyprid Decompostion and Evaluation (Master's Thesis)
reviewer: F. Wotawa; Institut für Informationssysteme, 2002
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J. Vilanek: Synthese eines SAB-R3223 in VHDL und State Charts (Master's Thesis)
Institut für Technische Informatik, 1997
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M. Delvai: Entwicklung eines Mikrokontrollers für das Echtzeitprotokoll TTP/A (Master's Thesis)
reviewers: A. Steininger, W. Elmenreich; Institut für Technische Informatik, 2000
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W. Huber: Simulation einer SCSI-Festplatte unter LINUX (Master's Thesis)
reviewer: A. Steininger; Institut für Technische Informatik, 2000
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T. Hinterstoisser: Entwicklung eines Mikroprozessorsmit Built-in Self-Test (Master's Thesis)
reviewer: A. Steininger; Institut für Technische Informatik, 2000
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E. Armengaud: Data Path for a FlrxRay-to-FlexRay Gateway (Master's Thesis)
reviewer: A. Steininger; Institut für Technische Informatik, 2002
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R. Steinwendtner: Experimentelle Verifikation eines Transparent Online Memory Test (Master's Thesis)
reviewer: A. Steininger; Institut für Technische Informatik, 2000
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C. Resanka: Communication protocol test device in VHDL (Master's Thesis)
reviewer: A. Steininger; Institut für Technische Informatik, 2002
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U. Eisenmann: Design and implementation of a highly efficient communication node for real-time applications (Master's Thesis)
reviewers: A. Steininger, M. Delvai; Institut für Technische Informatik, 2002
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K. Thaller: A Transparent Online Memory Test (PhD Thesis)
reviewers: A. Steininger, R. Eier; Institut für Technische Informatik, 2001
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C. Scherrer: Zuverlässigkeit zweifach redundanter Architekturen unter besonderer Berücksichtigung latenter Fehler (PhD Thesis)
reviewers: A. Steininger, R. Patzelt; Institut für Technische Informatik, 2002
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J. Vilanek: Zur Rolle der Verifikation im Designprozess digitaler integrierter Schaltungen (PhD Thesis)
reviewers: A. Steininger, R. Eier; Institut für Technische Informatik, 2001
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M. Horauer: Clock Synchronization in Distributed Systems (PhD Thesis)
reviewers: R. Eier, U. Schmid; Institut für Computertechnik, 2004
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