Publications

Shows publications by members of the Embedded Systems group.

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Journal Papers

I. Konnov, V. Veith, J. Widder: On the completeness of bounded model checking for threshold-based distributed algorithms: Reachability
Information and Computation, 252 (2017), p. 95 - 109
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M. Shafique, A. Ivanov, B. Vogel, J. Henkel: Scalable Power Management for On-Chip Systems with Malleable Applications
IEEE Transactions on Computers, 65 (2016), p. 3398 - 3412
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K. Chen, J. Chen, F. Kriebel, S. Rehman, M. Shafique, J. Henkel: Task Mapping for Redundant Multithreading in Multi-Cores with Reliability and Performance Heterogeneity
IEEE Transactions on Computers, 65 (2016), p. 3441 - 3454
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M. Shafique, M. Usman Karim Khan, J. Henkel: Content-Aware Low-Power Configurable Aging Mitigation for SRAM Memories
IEEE Transactions on Computers, 65 (2016), p. 3617 - 3630
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M Függer, T. Nowak, U. Schmid: Unfaithful Glitch Propagation in Existing Binary Circuit Models
IEEE Transactions on Computers, 65 (2016), p. 964 - 978
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Conference Papers

A. Kinali, F. Huemer, C. Lenzen: Fault-tolerant Clock Synchronization with High Precision
2016 IEEE Computer Society Annual Symposium on VLSI, Pittsburgh, PA, USA; in: Proc. 2016 IEEE Computer Society Annual Symposium on VLSI, 2016, p. 490 - 495
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T. Polzer, A. Steininger: A General Approach for Comparing Metastable Behavior of Digital CMOS Gates
19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Kosice, Slovakia; in: Proc 19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2016, ISBN: 978-1-5090-2467-4; 6 pages
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S. Varadan, A. Steininger: Study of a Delayed Single-Event Effect in the Muller C-element
21st IEEE European Test Symposium, Amsterdam; in: Proc 21st IEEE European Test Symposium, 2016, ISBN: 978-1-4673-9659-2
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S. Varadan, A. Steininger: Design and Physical Implementation of a Target ASIC for SET Experiments
2016 Euromicro Conference on Digital System Design (DSD), Limassol, Portugal; in: Proc. 2016 Euromicro Conference on Digital System Design (DSD), IEEE, 2016, ISBN: 978-1-5090-2817-7, p. 694 - 697
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T. Polzer, F. Huemer, A. Steininger: A Programmable Delay Line for Metastability Characterization in FPGAs
24th Austrian Workshop on Microelectronics (Austrochip), Villach; in: Proceedings 24th Austrian Workshop on Microelectronics, 2016; 6 pages
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Books

A. Steininger (invited): Fifty Shades of Synchrony
This Asynchronous Woirld, A. Mokhov (ed.); Newcastle University, Newcastle upon Tyne, 2016, ISBN: 978-0-7017-0257-1, p. 294 - 300
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R. Bloem, S. Jacobs, A. Khalimov, I. Konnov, S. Rubin, V. Veith, J. Widder: Decidability of Parameterized Verification
Morgan & Claypool Publishers, San Rafael, CA, USA, 2015, ISBN: 9781627057431; 170 pages
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A. Gmeiner, I. Konnov, U. Schmid, V. Veith, J. Widder (invited): Tutorial on Parameterized Model Checking of Fault-Tolerant Distributed Algorithms
Formal Methods for Executable Software Models, Springer, 2014, ISBN: 978-3-319-07316-3, p. 122 - 171
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J. Widder, U. Schmid: Booting Clock Synchronization in Partially Synchronous Systems with Hybrid Process and Link Failures
Distributed Computing, Springer-Verlag, 2007, p. 115 - 140
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P Tummeltshammer, J.C Hoe, M. Pueschel: Time-Multiplexed Multiple Constant Multiplication
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE, 2007, p. 1551 - 1563
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Editorials

B. Charron-Bost, S. Dolev, J. Ebergen, U. Schmid: Fault-Tolerant Distributed Algorithms on VLSI Chips
Dagstuhl Seminar Proceedings, series editors: B. Charron-Bost, S. Dolev, U. Schmid, issued by: Leibniz Zentrum Informatik, Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, Germany, 2009, ISSN: 1862-4405
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Theses

C. Hermann: ASCARTS Design of an Asynchronous Processor using a High-Level Specification Language (Master's Thesis)
reviewers: A. Steininger, J. Lechner; Institut für Technische Informatik, 2016
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P. Robinson: Weak System Models for Fault-Tolerant Distributed Agreement Problems (PhD Thesis)
reviewers: U. Schmid, M. Raynal; Institut für Technische Informatik (E182/2), 2011; oral examination: 2011-01-31
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A. Kößler: Real-Time Performance Analysis of Synchronous Distributed Systems (PhD Thesis)
reviewers: U. Schmid, K. Chatterjee; Institut für Technische Informatik (E182/2), 2014; oral examination: 2014-11-27
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R. Kutschera: Efficient Interfacing Between Timing Domains (Master's Thesis)
reviewer: A. Steininger; Technische Informatik, 2014
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C. Trenkwalder: Effekte von Stuck-At Faults in Delay-Insensitiver Logik (Master's Thesis)
reviewer: A. Steininger; Technische Informatik, 2014
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Presentations

A. Kinali, F. Huemer, C. Lenzen: Fault-tolerant Clock Synchronization with High Precision
2016 IEEE Computer Society Annual Symposium on VLSI, Pittsburgh, PA, USA; in: Proc. 2016 IEEE Computer Society Annual Symposium on VLSI, 2016, p. 490 - 495
bib details doi

T. Polzer, A. Steininger: A General Approach for Comparing Metastable Behavior of Digital CMOS Gates
19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Kosice, Slovakia; in: Proc 19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2016, ISBN: 978-1-5090-2467-4; 6 pages
bib details

S. Varadan, A. Steininger: Study of a Delayed Single-Event Effect in the Muller C-element
21st IEEE European Test Symposium, Amsterdam; in: Proc 21st IEEE European Test Symposium, 2016, ISBN: 978-1-4673-9659-2
bib details

S. Varadan, A. Steininger: Design and Physical Implementation of a Target ASIC for SET Experiments
2016 Euromicro Conference on Digital System Design (DSD), Limassol, Portugal; in: Proc. 2016 Euromicro Conference on Digital System Design (DSD), IEEE, 2016, ISBN: 978-1-5090-2817-7, p. 694 - 697
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T. Polzer, F. Huemer, A. Steininger: A Programmable Delay Line for Metastability Characterization in FPGAs
24th Austrian Workshop on Microelectronics (Austrochip), Villach; in: Proceedings 24th Austrian Workshop on Microelectronics, 2016; 6 pages
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Reports, Miscellaneous

M. Biely, P. Robinson, U. Schmid, M. Schwarz, K. Winkler: Gracefully Degrading Consensus and k-Set Agreement in Directed Dynamic Networks
TUW-258404, 2016
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M. Zeiner, U. Schmid, U. Schilcher, C. Bettstetter: FWF-Proposal SPRG: Structural Properties of Random Graphs
Institut für Technische Informatik, TU Wien, 2016
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D. Pfleger, U. Schmid: A Framework for Connectivity Monitoring in Wireless Sensor Networks
TUW-241107, 2015
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M. Schwarz, K. Winkler, U. Schmid: Fast Consensus under Eventually Stabilizing Message Adversaries
TUW-240061, 2015; 13 pages
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U. Schmid: FWF-Proposal ADynNet: Gracefully Degrading Agreement in Directed Dynamic Networks
TUW-235381, 2014
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Older Publications

Older and additional publications may be found on an external server at http://www.vmars.tuwien.ac.at/papers/papers.html.