FATAL - A Modeling Framework for Fault-Tolerant Asynchronous Logic

FATAL project aim

The aim of the FATAL project is the development of the mathematical/formal foundations of a framework for the hierarchical modeling and analysis of fault-tolerant asynchronous VLSI circuits, using fault-tolerant distributed algorithms knowledge in conjunction with the experimental assessment of both radiation-induced failures and metastability in modern VLSI technology. It is a joint project of our Institute of Computer Engineering (E182) with the Institute of of Electrodynamics, Microwave and Circuit Engineering (E354).

Main topics:

• Modeling and analysis of fault-tolerant asynchronous circuits: Need to deal with continuous time, continuous computation, fault-tolerance, self-stabilization and metastability
• Radiation failure models: Realistic modeling of radiation-induced failures in digital asynchronous circuits
• Metastability modeling: Realistic modeling of metastability generation and propagation in asynchronous digital circuits

[Project abstract]

This work has been supported by the Austrian Science Fund (FWF)
www.fwf.ac.at under project number P21694.

Project duration: 2009-2014
Project Head: Prof. Ulrich Schmid

The project has already been terminated, the final project report can be found here.

Selected publications

• Danny Dolev, Matthias Fugger, Christoph Lenzen, Markus Posch, Ulrich Schmid, and Andreas Steininger. Rigor-
  ously modeling self-stabilizing fault-tolerant circuits: An ultra-robust clocking scheme for systems-on-chip. Journal of
  Computer and System Sciences, 2014.
• Danny Dolev, Matthias Fugger, Ulrich Schmid, and Christoph Lenzen. Fault-tolerant algorithms
  for tick-generation in asynchronous logic: Robust pulse generation. Journal of the ACM, 2014.
• Danny Dolev, Matthias Függer, Christoph Lenzen, Martin Perner, and Ulrich Schmid. HEX: Scaling Honeycombs is Easier than Scaling Clock Trees. In Proc. 25th ACM Symp. on Parallelism in Algorithms and Architect ures (SPAA’13), pages 164–175, 2013.
• Matthias Függer and Ulrich Schmid. Reconciling fault-tolerant distributed computing and systems-on-chip. Distributed Computing, 24(6):323-355, 2012.

• Varadan Savulimedu Veeravalli, Thomas Polzer, Andreas Steininger, Ulrich Schmid, Michael Hofbauer, Kurt Schweiger, Horst Dietrich, Kerstin Schneider-Hornstein, Horst Zimmermann, Kay-Obbe Voss, Bruno Merk, and Michael Hajek. An infrastructure for accurate characterization of single-event transients in digital circuits. Microprocessors and Microsystems, 37(8-A):772–791, 2013. http://www.sciencedirect.com/science/article/pii/S0141933113000598
• Kurt Schweiger, Michael Hofbauer, Horst Dietrich, Horst Zimmermann, Kay-Obbe Voss, and Bruno Merk. Position dependent measurement of single event transient voltage pulse shapes under heavy ion irradiation. Electronics Letters 48(3):171--172, 2012.
• Michael Hofbauer, Kurt Schweiger, Horst Dietrich, Horst Zimmermann, Kay-Obbe Voss, Bruno Merk, Ulrich Schmid, and Andreas Steininger. Pulse shape measurements by on-chip sense amplifiers of single event transients propagating through a 90 nm bulk CMOS inverter chain. IEEE Transactions on Nuclear Science, 59(6):2778–2784, December 2012.

• Michael Hofbauer, Kurt Schweiger, Horst Zimmermann, Ulrich Giesen, Frank Langner, Ulrich Schmid, Andreas Steininger. Supply Voltage Dependent On-chip Single Event Transient Pulse Shape Measurements in 90 nm Bulk CMOS under Alpha Irradiation. IEEE Transactions on Nuclear Science 60(4):2640–2646, August 2013.

• Varadan Savulimedu Veeravalli, Andreas Steininger. Radiation-Tolerant Combinational Gates – An Implementation Based Comparison. In Proceedings 15th IEEE International Symposium on Design and Diagnosis of Electronic Circuits and Systems (DDECS 2012), IEEE CS press, 2012.

• Varadan Savulimedu Veeravalli, Andreas Steininger. Efficient Radiation-Hardening of a Muller C-Element. In Proceedings 2012 Single Event Effects Symposium (SEE 2012).
• Varadan Savulimedu Veeravalli, Andreas Steininger. Monitoring Single Event Transient Effects in Dynamic Mode. In Proceedings 1st Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN 2012).
• Varadan Savulimedu Veeravalli, Andreas Steininger, and Ulrich Schmid. Measuring set pulsewidths in logic gates using digital infrastructure. In Proceedings Internationsal Symposium on Quality of Electronic Design (ISQED’14), 2014.

• Thomas Polzer and Andreas Steininger. An approach for efficient metastability char-acterization of FPGAs through the designer. In 19th IEEE International Symposium on Asynchronous Circuits and Systems, May 2013, 2013.
• Thomas Polzer and Andreas Steininger. Metastability characterization for Muller C-elements. In Proceedings 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS’13), pages 164–171, 2013.
• Matthias Függer, Thomas Nowak, and Ulrich Schmid. Unfaithful glitch propagation in existing binary circuit models. In Proceedings 19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC’13), pages 191–199. IEEE Computer Society, 2013.

Partners

Vienna University of Technology
Institute of Computer Engineering
Embedded Computing Systems Group, E182-2
http://www.ecs.tuwien.ac.at

Vienna University of Technology
Institute of Electrodynamics, Microwave and Circuit Engineering, E354
http://www.emst.tuwien.ac.at

Vienna University of Technology
Institute of Atomic and Subatomic Physics, E141
http://www.ati.ac.at