Andreas Steininger

Andreas Steininger
Professor Dipl.-Ing. Dr.techn.
Phone +43-1-58801-18251
Fax +43-1-58801-18297

Vienna University of Technology
Institute of Computer Engineering
Embedded Computing Systems
Treitlstrasse 1-3 / 2nd floor


Andreas Steininger is leading a VLSI design team at the Institute. He received his Diplomingenieur degree (MS) in Electrical Engineering in 1988 and the PhD in Computer Engineering in 1994, both from the TU Wien. In 1999 Steininger received his "venia docendi" in Computer Engineering. He held visiting positions at the Siemens Research Center in Munich and at Logic Vision in San Jose, CA.

Steininger has been involved in many industrial and scientific projects concerned with real-time communication networks (X-by-wire, TTA), the design of fault-tolerant / radiation-tolerant computer architectures and their evaluation by means of fault-injection (PDCS, EXTRACT, FATAL, EASET), testing (built-in self-test, on-line testing) (STEACS, CEVTES), asynchronous logic design (DARTS, ENROL). His current research focuses on asynchronous (“clockless”) logic design, timing-domain interfacing, metastability, and GALS architectures. He has published 150+ papers in journals and at international conferences (see TU Wien publication database), and is co-inventor of 10+ patents.

Much of his scientific work was done in cooperation with industrial partners like Intel, Bosch, RUAG Space, Thales, Elektrobit, Audi, TTTech, Gleichmann Research, Frequentis, Daimler Chrysler, Elin, Festo etc.

Steininger is a member of the IEEE and served as PC member and steering committee member for many conferences, was PC Chair of ASYNC 2014, MEDIAN Finale Workshop 2015, DDECS 2016, and local host/General Chair of DDECS 2010 and ASYNC 2018.

With respect to teaching Steininger is contributing to the (Bachelor and Master) curriculum of Computer Engineering at the Faculty of Informatics, mainly with his courses on Digital Design, Advanced Digital Design and HW/SW Codesign. He has given invited lectures at international universities and summer schools.

He has supervised 20+ successful PhD theses and serves as the Director for the Vienna PhD School of Informatics and as chair of the Doctoral College Resilient Embedded Systems.