Practicals & Theses

list of practicals and theses at the Cyber-Physical Systems Group

Details for Optimizations for Time-predictable Code

Design and to implement optimisations that are tailored to single-path code generation.


Prior knowledge of the timing behavior of hard real-time systems is essential to guarantee their correct operation. With contemporary platforms, obtaining safe execution-time bounds is often infeasible. Even on architectures that are suited for timing analysis, an extraordinary amount of effort is required for the analysis of real-time code.
Therefore, more constructive approaches for real-time oriented development have been proposed.

In the timing analysis group at the Cyber-Physical Systems institute, we have developed a strategy to generate code that is easy to analyze and has stable timing properties.
The method of single-path code generation produces code that is free from input-data dependent control flow.
We have implemented a prototype in the LLVM-based backend for the Patmos time-predictable processor.

The basic principle of single-path code generation is the serialization of control-flow alternatives. Therefore, traditional compiler optimizations like tail duplication or loop unswitching actually degrade performance of the resulting code. The goal of this thesis is to devise and to implement optimisations that are tailored to single-path code generation.

Required Skills

* Proficiency in C++
* Basic knowledge of compiler construction and compiler optimizations
* Basic knowledge of real-time systems and worst-case execution time analysis is an advantage
* Experience with the LLVM framework (optional)


Ao.Univ.Prof. Dipl.-Ing. Dr.techn. Peter Puschner