We show how the requirements of the SENT communication protocol between a magnetic sensor and an electronic control unit (ECU) can be monitored in real time, with a monitor capable of processing 70 million samples per second. We elaborate on a complete flow from formalizing electrical and timing requirements using Signal Temporal Logic (STL) and Timed Regular Expressions (TRE), to implementing runtime monitors in FPGA hardware and evaluating the results in the lab. For a class of asynchronous serial protocols, we define a procedure to obtain monitors that are capable to recover after violations. We elaborate on two different approaches to monitor the requirements of interest: (i) Temporal testers with SystemC, STL and High-Level Synthesis; (ii) Automata-based approach with TRE in HDL. We also present how the results of the monitoring can be used for error logging to provide users with extensive debugging information. Our approach allows to monitor requirements-specification conformance in real time for long-term tests.
In Proc. of CAV'17, the 29th International Conference on Computer-Aided Verification, Heidelberg, Germany, July, 2017, Springer, LNCS.
*This work was partially supported by the NSF-Frontiers Cyber-Cardia
Award, the US-AFOSR Arrive Award, the EU-Artemis EMC2 Award, the
EU-Ecsel Semi40 Award, the EU-Ecsel Productive 4.0 Award, the
AT-FWF-NFN RiSE Award, the AT-FWF-LogicCS-DC Award, the AT-FFG
Harmonia Award, the AT-FFG Em2Apps Award, and the TUW-CPPS-DK Award.