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Andreas Steininger


Andreas Steininger is leading a VLSI design team at the Institute. He received his Diplomingenieur degree (MS) in Electrical Engineering in 1988 and the PhD in Computer Engineering in 1994, both from the Vienna University of Technology. In 1999 Steininger received his "venia docendi" in Computer Engineering. He held visiting positions at the Siemens Research Center in Munich and at Logic Vision in San Jose, CA.

Within the last decade Steininger has been involved in many industrial and scientific projects concerned with real-time communication networks, the design of fault-tolerant computer architectures and their evaluation by means of fault-injection (PDCS, X-by-wire, TTA, STEACS, DARTS, EXTRACT etc.). His interests further include testing (built-in self-test, on-line testing) and asynchronous (“clockless”) processors. He has published over 80 papers in journals and at international conferences.

Steininger is a member of the IEEE